Graduate Thesis Or Dissertation
 

Predicting transistor switching time

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/h989r5400

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  • This thesis is a development of two sets of equations predicting the switching times of a saturated transistor. The first set of equations defines the rise, storage, and fall times at a single operating point where the transistor beta, cutoff frequency and collector capacitance are known. The second set of equations is for use with a manufacturers specification sheet describing the transistor parameters and the test conditions of a specified set of switching times. First in this development three common-transistor models for switching conditions are reviewed pointing out their special definitions, approximations and switching equations. Next, the information furnished by manufacturers which is useful in switching circuit design is discussed. In the final section, the two sets of equations are developed using the switching equations of the three transistor-model developments as a base. Also developed to accompany the second set of equations is a set of three graphs from which a constant, determined by the circuit parameters, may be obtained, that multiplied with the specified switching times will yield an approximation to the switching times of the new circuit.
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  • File scanned at 300 ppi using Capture Perfect 3.0 on a Canon DR-9050C in PDF format. CVista PdfCompressor 5.0 was used for pdf compression and textual OCR.
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