Graduate Thesis Or Dissertation

 

The architecture and design of a parallel sorting engine Público Deposited

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/jq085n813

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  • Sorting is typically a compute intensive operation used in many areas of industry. With improved technology, both in the VLSI and CAE areas, we can afford to develop hardware based database computers to move the work load off the main computer. In this thesis the architecture of a VLSI parallel pipelined Rebound Sorter is presented. This sorter sorts during its I/O operations with O(n) time complexity. The architecture is often referred to as a systolic system, bringing together the concepts of parallelism, pipelining, and interconnecting structures into a unified framework.
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  • File scanned at 300 ppi (Monochrome) using ScandAll PRO 1.8.1 on a Fi-6670 in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
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