A microarchitecture study of the counterflow pipeline principle Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/m039k817x

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  • The counterflow pipeline concept was originated by Sproull et. al.[1] to demonstrate the concept of asynchronous circuits. The basic premise is that a simple architecture with only local communication and control and a simple regular structure will result in increased performance. This thesis attempts to analyze the performance of the basic counterflow pipeline architecture, find the bottlenecks associated with this implementation, and attempt to illustrate the improvements that we have made in overcoming these bottlenecks. From this research, three distinct microarchitectures have been developed, ranging from a synchronous version of the counterflow design suggested by Sproull to an all new structure which supports aggressive speculation, no instruction stalling and ultimately intrinsic multi-threading. To support high-level simulation of various architectures a Java based simulation environment has been developed which was used to explore the various design trade-offs and evaluate the resulting performance of each of the architectures.
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  • File scanned at 300 ppi (Monochrome, 8-bit Grayscale) using ScandAll PRO 1.8.1 on a Fi-6770A in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2012-09-26T17:16:20Z (GMT) No. of bitstreams: 1 JanikKennethJ1998.pdf: 11884064 bytes, checksum: 3b3b453505f3c506a1c32ab19b629ba3 (MD5)
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2012-09-26T17:18:08Z (GMT) No. of bitstreams: 1 JanikKennethJ1998.pdf: 11884064 bytes, checksum: 3b3b453505f3c506a1c32ab19b629ba3 (MD5)
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