Amorphous oxide semiconductor thin-film transistor ring oscillators and material assessment Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/n583xx76t

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  • Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) constitute the central theme of this thesis. Within this theme, three primary areas of focus are pursued. The first focus is the realization of a transparent three-stage ring oscillator with buffered output and an output frequency in the megahertz range. This leads to the possibility of transparent radio frequency applications, such as transparent RFID tags. At the time of its fabrication, this ring oscillator was the fastest oxide electronics ring oscillator reported, with an output frequency of 2.16 MHz, and a time delay per stage of 77 ns. The second focus is to ascertain whether a three-terminal device (i.e., a TFT) is an appropriate structure for conducting space-charge-limited-current (SCLC) measurements. It is found that it is not appropriate to use a diode-tied or gate-biased TFT configuration for conducting a SCLC assessment since square-law theory shows that transistor action alone gives rise to I proportional to V² characteristics, which can easily be mistakenly attributed to a SCLC mechanism. Instead, a floating gate TFT configuration is recommended for accomplishing SCLC assessment of AOS channel layers. The final focus of this work is to describe an assessment procedure appropriate for determining if a dielectric is suitable for use as a TFT gate insulator. This is accomplished by examining the shape of a MIM capacitor's log(J)-ξ curve, where J is the measured current density and ξ is the applied electric field. An appropriate dielectric for use as a TFT gate insulator will have a log(J)-ξ curve that expresses a clear breakover knee, indicating a high-field conduction mechanism dominated by Fowler-Nordheim tunneling. Such a dielectric produces a TFT with a minimal gate leakage which does not track with the drain current in a log(I[subscript D])-V[subscript GS] transfer curve. An inappropriate dielectric for use as a TFT gate insulator will have a log(J)-ξ curve that does not express a clear breakover knee, indicating that the dominate conduction mechanism is defect driven (i.e., pin-hole like shunt paths) and, therefore, the dielectric is leaky. It is shown that experimental log(J)-ξ leakage curves can be accurately simulated using Ohmic, space-charge-limited current (SCLC), and Fowler-Nordheim tunneling conduction mechanisms.
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