Design of complex digital blocks using folded source-coupled logic for mixed-mode applications Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/pk02cd67w

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  • A series of complex digital blocks have been designed and fabricated using the newly developed current-mode differential CMOS logic family viz. the Folded Source-Coupled Logic ( FSCL ). The main feature of this logic family is the low current spikes generated during the switching transitions ( at least 2 orders of magnitude smaller than the conventional static CMOS gates ). The design of a decimation filter using novel Multi-Rate systolic architecture and it's implementation in Folded Source-Coupled Logic is also considered. The decimation filter thus designed can be used in mixed-mode applications like Sigma-Delta A/D converter to improve it's performance characteristics like dynamic range, resolution and phase linearity at higher sampling rates.
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  • File scanned at 300 ppi (Monochrome) using ScandAll PRO 1.8.1 on a Fi-6770A in PDF format. CVista PdfCompressor 5.0 was used for pdf compression and textual OCR.
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-02-14T20:52:52Z (GMT) No. of bitstreams: 1 MaskaiSaileshR1992.pdf: 1569308 bytes, checksum: a820a62e53018b55ee1522e627869013 (MD5)
  • description.provenance : Made available in DSpace on 2013-02-25T18:16:05Z (GMT). No. of bitstreams: 1 MaskaiSaileshR1992.pdf: 1569308 bytes, checksum: a820a62e53018b55ee1522e627869013 (MD5) Previous issue date: 1991-05-07
  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-02-25T18:16:04Z (GMT) No. of bitstreams: 1 MaskaiSaileshR1992.pdf: 1569308 bytes, checksum: a820a62e53018b55ee1522e627869013 (MD5)
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