An alternative architecture for performing basic computer arithmetical operations Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/qf85nf34x

Descriptions

Attribute NameValues
Creator
Abstract or Summary
  • The arithmetic portions of almost all modern processor architectures are of very similar design. We use the term "traditional" to describe this design, the primary characteristics of which are native support for integer and floating-point number types and special disjoint instructions and hardware for each supported type. Decades of refinement have endowed this traditional arithmetic architecture with high performance, but also certain inherent limitations. The highly-specific instruction sets and circuitry that provide optimized performance for supported number types, also make it difficult to synthesize unsupported number types and manipulate them in an efficient manner. This trait also applies when using supported number types for arbitrary ranges greater than those directly implemented by the processor. In this thesis we present an alternative to the traditional computer arithmetic architecture, designed to address the limitations of the traditional approach while preserving most of its benefits. Instead of the specific number representation support provided by the instructions, hardware and native data types in a traditional ALU/FPU pair, we define a single data type, the XLU digit that forms a base from which other number types may be easily derived, along with a set of instruction primitives from which basic arithmetic operations may be efficiently realized. Our data type has a signed-digit representation, which allows algorithms for addition, subtraction and multiplication to achieve a high degree of parallelism at the primitive instruction level. The instruction primitives and algorithms are designed to hide or eliminate as much branching as possible, further increasing instruction-level independence. We provide details of the data type, an overview of the set of instruction primitives, and a discussion of how to use those instruction primitives to perform basic arithmetic algorithms for addition, subtraction and multiplication. We also give examples for three derived number representations; integer, fixed-point and floating-point numbers. We believe that our approach of building from a unified base provides flexibility and scalability beyond that of the traditional arithmetic architecture. Our data type, the XLU digit, and the primitive operations to manipulate it may be implemented with modest amounts of circuitry, and this, together with the highly parallel nature of the entire design means that many XLU circuit blocks can be realized in the same silicon area as one traditional ALU/FPV pair. An ALU or FPU may only work when it has the correct type to work on, whereas we believe any and all XLUs available to the processor can be kept busy almost all of the time, achieving greater utilization of the available silicon.
Resource Type
Date Available
Date Copyright
Date Issued
Degree Level
Degree Name
Degree Field
Degree Grantor
Commencement Year
Advisor
Academic Affiliation
Non-Academic Affiliation
Subject
Rights Statement
Peer Reviewed
Language
Digitization Specifications
  • File scanned at 300 ppi (Monochrome) using Capture Perfect 3.0.82 on a Canon DR-9080C in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
Replaces
Additional Information
  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2012-08-29T22:21:49Z (GMT) No. of bitstreams: 1 DjangKevin2001.pdf: 2981725 bytes, checksum: 323b297815899d4b9e657fd81055bf05 (MD5)
  • description.provenance : Made available in DSpace on 2012-08-29T22:21:49Z (GMT). No. of bitstreams: 1 DjangKevin2001.pdf: 2981725 bytes, checksum: 323b297815899d4b9e657fd81055bf05 (MD5) Previous issue date: 2000-05-11
  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2012-08-29T22:18:47Z (GMT) No. of bitstreams: 1 DjangKevin2001.pdf: 2981725 bytes, checksum: 323b297815899d4b9e657fd81055bf05 (MD5)
  • description.provenance : Submitted by Sergio Trujillo (jstscanner@gmail.com) on 2012-08-29T21:40:52Z No. of bitstreams: 1 DjangKevin2001.pdf: 2981725 bytes, checksum: 323b297815899d4b9e657fd81055bf05 (MD5)

Relationships

Parents:

This work has no parents.

Last modified

Downloadable Content

Download PDF

Items