Designing a reconfigurable embedded processor Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/s7526f739

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  • The growth of applications for embedded processors has spawned a need for highly configurable devices. Custom microprocessors have long life cycles for a fast paced market, where as off-the-shelf designs often do not provide the level of configuration, nor the ability to allow system-on-chip designs. This paper presents a description for a software environment that allows designers to provide configuration options for a design, and responds by dynamically reconfiguring the environment to provide a ready to test design. A background survey is provided on current embedded RISC architectures, along with a proposed new embedded ISA and a cycle-level simulator. Justification is presented for a new instruction format to reduce code size with little loss to performance. A manual is also provided for the new ISA.
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  • File scanned at 300 ppi (Monochrome, 256 Grayscale) using Capture Perfect 3.0.82 on a Canon DR-9080C in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2012-08-08T20:08:36Z (GMT) No. of bitstreams: 1 MatsonJohnM2003.pdf: 690621 bytes, checksum: f1008b2c5c9ef1de6d00e0c944debe04 (MD5)
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2012-08-08T20:06:44Z (GMT) No. of bitstreams: 1 MatsonJohnM2003.pdf: 690621 bytes, checksum: f1008b2c5c9ef1de6d00e0c944debe04 (MD5)
  • description.provenance : Made available in DSpace on 2012-08-08T20:08:36Z (GMT). No. of bitstreams: 1 MatsonJohnM2003.pdf: 690621 bytes, checksum: f1008b2c5c9ef1de6d00e0c944debe04 (MD5) Previous issue date: 2003-05-02

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