Graduate Thesis Or Dissertation
 

Low-power design techniques for low-voltage analog-to-digital converters

Público Deposited

Contenido Descargable

Descargar PDF
https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/vd66w4615

Descriptions

Attribute NameValues
Creator
Abstract
  • The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while operating with low supply voltage. In this thesis, two low-power design techniques for low-voltage data converters are proposed. The first technique is low-voltage double-sampling method for delta-sigma analog-to-digital converters using a combination of switched-RC technique and floating switched-capacitor configuration. The second technique is an improved clocking scheme for algorithmic analog-to-digital converters with on-chip delay-locked-loop. A 0.9V 92dB delta-sigma audio ADC and a 10MS/s 11-b algorithmic ADC were implemented to demonstrate the proposed design techniques.
License
Resource Type
Fecha Disponible
Fecha de Emisión
Degree Level
Degree Name
Degree Field
Degree Grantor
Commencement Year
Advisor
Committee Member
Academic Affiliation
Non-Academic Affiliation
Subject
Declaración de derechos
Publisher
Peer Reviewed
Language
File Format
File Extent
  • 1981950 bytes
Replaces

Relaciones

Parents:

This work has no parents.

En Collection:

Elementos

Miniatura Título Fecha de subida Visibilidad Acciones
file details mgkim_thesis.pdf 2017-10-20 Público Descargar