Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/ws859k02m

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  • This work presents the design and implementation of a low power phased-array receiver frontend at 28 GHz in 65 nm CMOS. The frontend incorporates a low- power low-noise amplifier(LNA) and a passive reflection-type phase shifter (RTPS) capable of providing 360° phase shift with 5-bit phase resolution and low loss variation. Passive phase-shifters in the literature suffer from trade-offs between finite phase resolution, insertion loss and phase shift range, and hence do not provide 360° phase range with uniform, low loss across phase shift settings. The proposed systematic design and load optimization approach leads to the RTPS achieving state-of-art performance in terms of insertion loss with 360° phase shift range, loss variation across phase shift and rms phase error. The low-power LNA is based on a transformer-coupled neutralization architecture that increases gain in each LNA stage, allowing for lower power consumption. The phased-array frontend is designed for Ka-band applications and has been characterized in 65nm CMOS from 26 GHz -30 GHz. The measured RTPS achieves 360 degrees phase shift with -7.75+/-0.3 dB and rms phase error of 0.3 degrees at 28 GHz. The low power phased-array receiver frontend has overall gain of 9.5 dB, gain variation of +/-0.4 dB and measured noise figure of 4.9 dB at 28 GHz. The receiver frontend consumes 10 mW from a 0.9 V supply with phase shifter and LNA active area of 0.16 mm² and 0.32 mm² respectively in 65nm CMOS, demonstrating its suitability for integration into low-power phased array receivers for emerging high data rate 5G wireless communication applications at 28 GHz.
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  • description.provenance : Approved for entry into archive by Laura Wilson(laura.wilson@oregonstate.edu) on 2016-06-16T17:42:05Z (GMT) No. of bitstreams: 2 license_rdf: 1232 bytes, checksum: bb87e2fb4674c76d0d2e9ed07fbb9c86 (MD5) GargRobin2016.pdf: 5726382 bytes, checksum: b389d09e30f4f37b0b156792ea08d79e (MD5)
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