Graduate Thesis Or Dissertation
 

A MOS-transistor with submicron, and graded channel

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/zs25xc257

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  • The theoretical aspects and fabrication techniques of a new surface field-effect transistor were investigated. The new MOS-transistor uses a three-layer structure similar to those found in bipolar transistors. The new MOS structure introduces an impurity gradient in the channel region of the transistor and also makes it possible to reduce the channel length to the order of 0.5 μm as a lower limit. The impurity gradient in the channel region and the impurity profile of source, channel and drain regions are analyzed to establish a device model which characterizes the new transistor with emphasis on its high frequency capability. A basic fabrication process was developed in this project, which yielded successful devices capable of operating at a cutoff frequency in excess of one gigahertz and a drain supply of 100 volts. Improvements in operating frequency and other device parameters are still possible by optimizing the design of the experimental device.
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  • File scanned at 300 ppi (Monochrome, 8-bit Grayscale, 24-bit Color) using ScandAll PRO 1.8.1 on a Fi-6670 in PDF format. CVista PdfCompressor 5.0 was used for pdf compression and textual OCR.
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