Electrical Transport Measurements Show Intrinsic Doping and Hysteresis in Graphene p-n Junction Devices Public Deposited

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  • Understanding the electrical transport properties of graphene provides a basis for determining its future as a potential semiconducting device that can be used for the next generation of transistors and photodetectors. Graphene p-n junctions can also function as field effect transistors, and thus are a logical starting point for I-V characterization. We perform transport measurements on dual topped gated p-n junctions with CVD grown graphene placed on a SiO2/Si substrate. I-V curves show the Fermi level of graphene near the Dirac point can be directly tuned by applying voltage to the gate contact and reveal the location of the Dirac point at 3.5 kΩ is shifted -0.02 eV from its expected location at zero gate bias. This indicates that slight intrinsic p-doping is present in the graphene sample. P-doping has been well documented in graphene based devices, and is attributed to adsorption of H2O or O2 molecules at the graphene/SiO2 interface. Using the measured transfer curves of source-drain current vs top gate voltage, the conductance of the graphene sample is plotted as a function of top gate voltage and the differential change in the linear portion of the curve is used to estimate a carrier mobility for the CVD graphene as 17,400 cm2/Vs. The most commonly reported mobilities for CVD grown graphene on SiO2 typically fall in the range of 500-10,000 cm2/Vs, indicating that the device has high mobility. High mobility is attributed to the large grain graphene flakes present in the device, which allow more uniform conduction compared with small grain flakes. When gate sweeps are performed, hysteresis is observed in the p-n junctions, as has been reported in several previous studies on graphene based FETs. Hysteresis is caused by two mechanisms: charge trapping of adsorbates, such as H2O and O2, at the graphene/SiO2 interface and an electrochemical redox reaction that occurs at the interface. The presence of two Dirac peaks in the hysteretic response is the result of the dual top-gate configuration of the device.
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  • description.provenance : Approved for entry into archive by Steven Van Tuyl(steve.vantuyl@oregonstate.edu) on 2017-06-12T17:01:09Z (GMT) No. of bitstreams: 2 license_rdf: 1223 bytes, checksum: d127a3413712d6c6e962d5d436c463fc (MD5) PlunkettGarrettR2017.pdf: 1891105 bytes, checksum: 52f456186f728209dcd4820782b45d89 (MD5)
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  • description.provenance : Submitted by Garrett Plunkett (plunketg@oregonstate.edu) on 2017-06-07T22:59:54Z No. of bitstreams: 2 license_rdf: 1223 bytes, checksum: d127a3413712d6c6e962d5d436c463fc (MD5) PlunkettGarrettR2017.pdf: 1891105 bytes, checksum: 52f456186f728209dcd4820782b45d89 (MD5)

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