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Filtering by: Creator Hall, Lynn L. Remove constraint Creator: Hall, Lynn L. Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Oscillators and phase locked loops for space radiation environments

    Creator:
    Vandepas, Martin
    Abstract:
    Circuits operating outside the earth’s atmosphere are more vulnerable to cosmic radiation and require special design consideration. The purpose of this work is to explore methods of mitigating the effect of radiation in phase locked loop (PLL) circuits. Several voltage controlled oscillators (VCOs) and two complete PLLs are designed and...
    Resource Type:
    Masters Thesis
    Full Text:
    University Press, Cambridge, 1998. [8] B. Razavi. RF Microelectronics. Prentice Hall, 1998. [9] J. L

  • Automated synthesis of analog to digital conversion

    Creator:
    Weaver, Skyler
    Abstract:
    This thesis describes circuit architectures and techniques that facilitate the automatic synthesis and fabrication of analog-to-digital converters (ADCs). Since automated synthesis already exists for digital circuits and is part of the digital circuit design flow, this work demonstrates the feasibility of ADC synthesis with little or no modification to presently...
    Resource Type:
    Dissertation

  • A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications

    Creator:
    Xiao, Ying
    Abstract:
    A novel switched-R-MOSFET-C input branch is proposed for low-voltage and high-linearity applications. The tunability is achieved by varying the clock duty cycle using an automatic tuning circuit. This tuning method does not involve a change in gate voltage, and is therefore particularly suitable for low-voltage applications. The advantages of the...
    Resource Type:
    Masters Thesis
    Full Text:
    my office-cohorts in Owen Hall 245 for the memorable joy they have given me. Most importantly, I

  • High-speed CMOS dual-modulus presalers for frequency synthesis

    Creator:
    Desikachari, Ranganathan
    Abstract:
    Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
    Resource Type:
    Masters Thesis
    Full Text:
    Vdd bounce or Gnd bounce by virtue of the I ·R or L· dI dt voltage drops. This kind of digital

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    diagram .................................................... 31 3.1 Distortion in L modulators

  • A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

    Creator:
    Wang, Xuesheng
    Abstract:
    This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
    Resource Type:
    Dissertation
    Full Text:
    output. The NTF is NTF="(2 1 Q(z) l+H(z) (2-3) where H(z) is a low-pass transfer function. In the

  • Digital phase-locked loops for multi-GHz clock generation

    Creator:
    Kratyuk, Volodymyr
    Abstract:
    A digital implementation of a PLL has several advantages compared to its analog counterpart. These include easy scalability with process shrink, elimination of the noise susceptible analog control for a voltage controlled oscillator (VCO) and the inherent noise immunity of digital circuits. Several recent digital PLL (DPLL) implementations have achieved...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.7 Multibit TDC. (a) 1 bit, (b) 2 bit, and (c) L bit. . . . . . . . . . . . . . . . . 29 3.8

  • Continuous time input pipeline ADCs

    Creator:
    Gubbins, David Patrick
    Abstract:
    Analog-to-digital converters (ADCs) convert analog continuous time signals into discrete time, digital format. One precondition that must be met for conventional nyquist rate ADCs is that the input signal must be suitably band-limited to an input bandwidth less than the nyquist frequency. This mandates expensive anti-alias filters which contribute to...
    Resource Type:
    Dissertation
    Full Text:
    of which resolves some digital bits. Stage 1 resolves k bits, stage 2 resolves L bits and so on

  • Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters

    Creator:
    Coker, Brandilyn
    Abstract:
    Analog to digital converters (ADCs) are a critical part of communication between the physical world and the increasingly digital systems humans use every day. ADCs have inherent non-idealities that degrade performance. Nonlinearity is one of the most prevalent non-idealities that designers face. While calibration methods for nonlinearity exist in the...
    Resource Type:
    Masters Thesis
    Full Text:
    Hall, 2nd ed., 1997. [9] J. O. S. III, Mathematics of the Discrete Fourier Transform (DFT): with Audio

  • Design techniques for time based data converters

    Creator:
    Gande, Manideep
    Abstract:
    Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data converters which use time based processing. Another artifact of geometry scaling is the increase in complexity of digital circuitry available on traditional analog ICs, as...
    Resource Type:
    Dissertation