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Filtering by: Creator Faustini, John M. Remove constraint Creator: Faustini, John M. Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF John A. Liebert for the degree of Master of Science in Electrical

  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    never have materialised. I also want to thank Prof. Huaping Liu, Roger Traylor and Prof. William M

  • Model development via delay extraction for the time-domain simulation of lossy transmission lines.

    Creator:
    Blevins, Chris
    Abstract:
    This thesis presents two new approaches for the broadband, time-domain modeling of lossy transmission lines. Each approach is based on an alternative derivation of delay extraction in order to separate the line's linear phase from its attenuation and dispersion. Augmentation networks represent the derived attenuation networks as rational function approximations....
    Resource Type:
    Masters Thesis
    Full Text:
    each port. This approach is applied to single and coupled lines at lengths ranging from 5 cm to 10 m

  • Side channel attack resistant elliptic curves cryptosystem on multi-cores for power efficiency

    Creator:
    Yoo, Jaewon
    Abstract:
    The Advent of multi-cores allows programs to be executed much faster than before. Cryptoalgorithms use long-bit words thus parallelizing these operations on multi-cores will achieve significant performance improvement. However, not all long-bit word operations in cryptosystems are suitable for parallel execution on multi-cores. In particular, long-bit words used in Elliptic...
    Resource Type:
    Masters Thesis
    Full Text:
    appreciation to Professor Huaiping Liu, Traylor Roger, and John A. Nairn for their serving in my graduate

  • Surface-Normal Modulation of Fano Resonances in Metallic Photonic Crystals for Free-Space Optical Interconnects

    Creator:
    Ren, Fanghui
    Abstract:
    This dissertation focuses on the development of ultra-compact optical devices for free-space modulation. We propose a surface-normal modulator using metallic photonic crystals for free-space optical interconnects. The active control of light intensity is achieved by engineering the Fano resonances in metallic photonic crystals. Both thermo-optic modulation and electro-optic modulation of...
    Resource Type:
    Dissertation
    Full Text:
    extends to Professor John Conley, Professor Huaping liu, Professor Larry Cheng, and Professor Maggie

  • Analysis and design on low-power multi-Gb/s serial links

    Creator:
    Hu, Kangmin
    Abstract:
    High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most...
    Resource Type:
    Dissertation
    Full Text:
    my doctoral committee and being readers for this dissertation. I am indebted to Professor John

  • Low-power high-resolution delta-sigma ADC design techniques

    Creator:
    Wang, Tao
    Abstract:
    This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to the conventional active adder, the direct charge transfer (DCT) adder greatly saves power by keeping the feedback factor of the active adder unity. However, the...
    Resource Type:
    Dissertation
    Full Text:
    to me. I am grateful to Prof. Pavan Kumar Hanumolu, Prof. Huaping Liu, Prof. John F. Conley, Jr

  • Variable sampling compensation of networked control systems with delays using neural networks

    Creator:
    Lopez-Echevarria, Daniel
    Abstract:
    In networked control systems (NCS) information or packets usually flow from a sensor or a set of sensors to a remotely located controller. Then the controller processes the received information and sends a series of control commands to the actuators through a communication network which could be either wireless or...
    Resource Type:
    Dissertation
    Full Text:
    research and stay at Oregon State University. I also want to thank Professor John Schmitt for his

  • Some contributions to asymmetric error control codes

    Creator:
    Elmougy, Samir
    Abstract:
    In some practical systems, most of the errors are of 1 → 0 type and 0 → 1 errors occur very rarely. In this thesis, first, the capacity of the asymmetric channel is derived. The capacity of the binary symmetric channel (BSC) and the Z-channel can be derived from this...
    Resource Type:
    Dissertation
    Full Text:
    systematic t-unidirectional error detecting codes over Zm, m > 2 is designed. These codes can detect 2

  • An ultra low voltage micropower GPS receiver RF front-end for wildlife tracking

    Creator:
    Heiberg, Adam C.
    Abstract:
    A fully integrated CMOS GPS receiver RF front end optimized for low power operation is presented. The system operates with a supply voltage down to 250 mV. A prototype has been fabricated in a 0.13μm CMOS process and includes a low voltage LNA, quadrature oscillators, and quadrature mixers. It exhibits...
    Resource Type:
    Masters Thesis