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Filtering by: Alternative title ssim FS-262 Remove constraint Alternative title ssim: FS-262 Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Committee Member Moon, Un-Ku Remove constraint Committee Member: Moon, Un-Ku Language English [eng] Remove constraint Language: English [eng]

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  • A Wireless Energy Harvester for Powering Event-driven Internet-of-things Applications and Battery Charging

    Creator:
    Sadagopan, Kamala Raghavan
    Abstract:
    The need for sustainably powering unobtrusive internet-of-things applications has led to an interest in energy harvesting. Particularly, the proliferation of wireless communication and devices in the 2.4 GHz Industrial Scientific c Medical (ISM) band creates an opportunity to leverage commonly used devices for RF powering. This dissertation presents a low-quiescent-power...
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    Dissertation
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    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.6 Losses are a function of fs and switch sizes, and this dependence is illustrated here for PAV

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
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    Dissertation
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    ……………………………………………68 6-6a Output PSD with randomization, DWA,Bi DWA and SeDWA (fin =2-11 fs

  • Linearizing techniques for voltage controlled oscillator based analog to digital converters

    Creator:
    Rao, Sachin B.
    Abstract:
    Voltage controlled oscillator (VCO) based ADC is an important class of time-domain ADC that has gained widespread acceptance due to their several desirable properties. VCO-based ADCs behave like an open-loop continuous time ΔΣ modulator and achieve excellent resolution by first order noise shaping the quantization error. However, the SNDR of...
    Resource Type:
    Dissertation
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    matching requirement (800 fs-rms) on the delay-stages in the TDC that are used to generate the feedback

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
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    Dissertation
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    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 2.20 Measured transfer function of the filter for different values of GM,FB (FS=300 MS/s

  • Wideband and high accuracy delta sigma modulation data converter

    Creator:
    Jung, Youngho
    Abstract:
    Nowadays, needs for wideband and high accuracy analog-to-digital converter are increasing rapidly in manifold applications such as wireless communication, digital video and other consumer electronics. Besides, low power consumption is required to have longer battery life in portable systems. CMOS technology scaling and innovative modulator topology make the implementation much...
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    Dissertation
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    quantization noise is uniformly distributed from –fs/2 to fs/2, the Nyquist ADC’s total quantization noise

  • Design techniques for delta sigma modulators using VCO based ADCs

    Creator:
    Reddy, Karthikeyan
    Abstract:
    VCO-based ADCs have recently emerged as attractive alternative to conventional DeltaSigma (ΔΣ) modulator architectures. Few salient features of a VCObased ADC are: 1) the quantization noise is 1st order noise shaped, 2) it is an open loop architecture, and, 3) its implementation is mostly digital in nature. Hence, they are...
    Resource Type:
    Dissertation
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    NTF and NTF of the real modulator after matching for p=Fs and τ = 0.5

  • Design and analysis techniques for nano-joule ADCs and sampling linearity

    Creator:
    Brown, Thomas (Thomas William)
    Abstract:
    Two aspects of ADC system performance are addressed in this work. First, the combination of the ADC and its associated reference are co-designed for an energy constrained remote sensing system. Second, sampling linearity is mathematically analyzed as a function of frequency to provide enhanced understanding into an ADC's requisite sampling...
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    Dissertation
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    . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 3.14 Measured fundamental, HD2, HD3, HD4, and HD5 versus input frequency at Fs = 19MSPS

  • Digital Friendly Continuous-Time Delta-Sigma Analog-to-Digital Converters

    Creator:
    Maghami, Hamidreza
    Abstract:
    Conventional Delta-Sigma analog-to-digital converters (ADCs) utilize operational transconductance amplifiers (OTAs) in their loop filter implementation followed by multi-bit voltage domain quantizers. As CMOS integrated circuit technology scales to smaller geometries, the minimum transistor length and the intrinsic gain of the transistors decrease. Moreover, with process scaling the voltage headroom decreases...
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    Dissertation
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    zero and 2π radians, the maximum value of the second term is fs/KV CO1. Note that the value of ffr1 is

  • Low-power design techniques for low-voltage analog-to-digital converters

    Creator:
    Kim, Min Gyu
    Abstract:
    The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
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    Dissertation
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    . The factor OSR is referred to as the oversampling ratio (OSR), OSR = fs/2fB. Fig. 3.3 (a) and (b) are

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
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    the sampled one, the sampling frequency needs to be at least twice the signal bandwidth, i.e., fs