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Filtering by: Creator Chen, Jiaming Remove constraint Creator: Chen, Jiaming Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science

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  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    AN ABSTRACT OF THE DISSERTATION OF Jiaming Lin for the degree of Doctor of Philosophy in

  • Design techniques for successive approximation register analog-to-digital converters

    Creator:
    Tong, Tao
    Abstract:
    Successive approximation register analog-to-digital converters (SAR ADCs) have been widely used for medium-speed, medium-resolution applications due to their excellent power efficiency and digital compatibility. Recently, SAR ADCs are also penetrating into the applications which have been earlier dominated by delta-sigma ADCs and pipeline ADCs. However, the resolution of SAR ADCs...
    Resource Type:
    Masters Thesis
    Full Text:
    , Wenhuan Yu, Yan Wang, Ming Hung Kuo, Jeong Seok Chae, Sang Hyeon Lee, Jinzhou Cao, Jiaming Lin

  • Design techniques for low-power electrical and optical serial link receivers

    Creator:
    Bai, Rui
    Abstract:
    As computation power continues to grow, the demand for data transfer bandwidth is also rising. This is reflected in the increasing data-rate of high-speed links. However, the increase in data-rate is sustainable only if the I/O energy efficiency improves as well. This dissertation explores several techniques to enable high-speed links...
    Resource Type:
    Dissertation
    Full Text:
    Research Group during my internship. I thank Marco Fiorentino and Chin-Hui Chen at HP Labs, John Calvin

  • Power Efficient Architectures for High Accuracy Analog-to-Digital Converters

    Creator:
    Zhang, Yi
    Abstract:
    Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among multiple channels. On the other hand, continuous-time ∆Σ ADCs (CTDSM) have been receiving more and more attention as a power-efficient solution in targeting medium to...
    Resource Type:
    Dissertation
    Full Text:
    . Their valuable comments are greatly appreciated. I am indebted to Dr. Chia-Hung Chen, who is my best

  • Low-power successive approximation analog to digital converter with digital calibration

    Creator:
    Li, Wei
    Abstract:
    IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
    Resource Type:
    Dissertation
    Full Text:
    chip fabrication opportunity. Special thanks go to Jorge Grilo, Eric Fogleman, Xuefeng Chen, Kok

  • Low-power high-resolution delta-sigma ADC design techniques

    Creator:
    Wang, Tao
    Abstract:
    This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to the conventional active adder, the direct charge transfer (DCT) adder greatly saves power by keeping the feedback factor of the active adder unity. However, the...
    Resource Type:
    Dissertation
    Full Text:
    design experiences and familiarize with the company culture. I am very grateful that Chun-Ying Chen and

  • An efficient frequency controlled PFM for DC-DC converters

    Creator:
    Pai, Jeff
    Abstract:
    As more features are being integrated into mobile platforms, the demand for long battery life during standby mode has been increasing. Light load efficiency becomes one of essential features in today's DC-DC converter. The most effective method to improve light load efficiency is to operate the DC-DC converter under pulse-frequency-modulation...
    Resource Type:
    Masters Thesis
    Full Text:
    , Sang Hyion, Tao Wang, Derek Chen, Amr ElShazly, Jiaming Lin and people in my group for their

  • Design techniques for low power ADCs

    Creator:
    Yu, Wenhuan
    Abstract:
    This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the noise performance of the incremental ADC, and a new optimization technique was proposed to minimize the output noise. In the calibration mode, the incremental ADC...
    Resource Type:
    Dissertation
    Full Text:
    and kind help. They are Jinzhou Cao, Jeongseok Chae, Chia-Hung Chen, Xuefeng Chen, Xiaoran

  • Analysis and design on low-power multi-Gb/s serial links

    Creator:
    Hu, Kangmin
    Abstract:
    High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most...
    Resource Type:
    Dissertation
    Full Text:
    Chen, Hurst Kuo, Jiaming Lin, Jinzhou Cao, Tao Wang, Tao Tong, Xin Meng, Wei Li and Sanghyeon Lee in

  • Dynamic Error Calibration for Continuous-Time Delta-Sigma Modulator with Multi-GHz Sampling Rate

    Creator:
    He, Tao
    Abstract:
    Continuous-time ΔΣ modulators are widely used in cellular handsets due to their power efficiency and inherent anti-aliasing characteristics. To achieve demanding cellular bandwidth requirements while maintaining good power efficiency, multi-bit feedback is typically used. This approach provides benefits such as lower OSR, relaxed loop filter requirements, and reduced jitter sensitivity....
    Resource Type:
    Dissertation
    Full Text:
    Dr. Chia-Hung Chen and Dr. Yi Zhang. In addition to their solid technical expertise, they also