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Filtering by: Creator Carilli, Patrick B. Remove constraint Creator: Carilli, Patrick B. Academic Affiliation Electrical and Computer Engineering Remove constraint Academic Affiliation: Electrical and Computer Engineering Contributor advisor sim Fiez, Terri S. Remove constraint Contributor advisor sim: Fiez, Terri S.

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  • Design of sample and holds using CCDs in a standard CMOS process

    Creator:
    Ghatak, Kalyan Brata
    Abstract:
    The parasitic components of MOS switches at high speeds affect the linearity and resolution of CMOS sample and hold circuits. CCD-based circuit design can offer good performance at high speeds. This thesis presents the design of sample and hold circuits using charge-coupled device structures in a standard CMOS process. Three...
    Resource Type:
    Masters Thesis
    Full Text:
    Chennam, Taras Dudar, Patrick Birrer, Volodymyr Kratyuk, Yutao Hu, Edgar Constand, Nathen Barton