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Filtering by: Subject Electronic circuits -- Noise Remove constraint Subject: Electronic circuits -- Noise Advisor Hanumolu, Pavan Kumar Remove constraint Advisor: Hanumolu, Pavan Kumar Decade 2010-2019 Remove constraint Decade: 2010-2019

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  • Low-power techniques for supply-noise mitigation in phase-locked loops

    Creator:
    Arakali, Abhijith
    Abstract:
    Modern day digital systems employ frequency synthesizers to provide a common clock to the system. They are undergoing large scale integration due to which, mitigation of the effect of noise on power supply has become a major design consideration in clocking circuits. Rapid scaling of CMOS technology mandates the design...
    Resource Type:
    Dissertation
    Full Text:
    Recovery Circuit with High Supply Noise Immunity . . . . . 6 1.4 Thesis Organization

  • Performance enhancement techniques for low power digital phase locked loops

    Creator:
    Elshazly, Amr
    Abstract:
    Desire for low-power, high performance computing has been at core of the symbiotic union between digital circuits and CMOS scaling. While digital circuit performance improves with device scaling, analog circuits have not gained these benefits. As a result, it has become necessary to leverage increased digital circuit performance to mitigate...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.14 Block diagram of the complete supply noise insensitive DCO. . . . . 43 3.15 Circuit