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Hanumolu, Pavan Kumar
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Design techniques for delta sigma modulators using VCO based ADCs
Design techniques for VCO based digital sensor readout circuits
Time-based noise-shaping techniques for time-to-digital and analog-to-digital converters
Semi-digital PLL architecture for ultra low bandwidth applications
Performance enhancement techniques for low power digital phase locked loops
Digitally assisted control techniques for high performance switching DC-DC converters
Design of a low jitter digital PLL with low input frequency
Design techniques for successive approximation register analog-to-digital converters
Time-based analog signal processing
Dual referencing guidelines to minimize power delivery noise coupling
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Academic Affiliation
Electrical Engineering and Computer Science
16
Advisor
Hanumolu, Pavan Kumar
[remove]
20
Moon, Un Ku
2
Temes, Gabor C.
2
Commencement Year
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Current results range from
2007
to
2014
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Committee Member
Moon, Un-Ku
10
Mayaram, Kartikeya
9
Temes, Gabor
8
Liu, Huaping
4
Mayaram, Karti
3
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Committee Members
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Creator
Arakali, Abhijith
1
Bang, Sarvesh Jagdish
1
Brownlee, Merrick
1
Drost, Brian George
1
Edmonds, Christopher D.
1
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Date
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Current results range from
2006
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2014
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Decade
2010-2019
12
2000-2009
8
Degree Field
Electrical and Computer Engineering
17
Electrical Engineering
3
Computer Science
1
Degree Level
Doctoral
9
Master's
7
Bachelor's
4
Degree Name
Doctor of Philosophy (Ph.D.)
9
Master of Science (M.S.)
7
Honors Bachelor of Science (H.B.S.)
4
File Format
application/pdf
1
Language
English [eng]
20
License
All rights reserved
20
Non-Academic Affiliation
Oregon State University. Graduate School
16
Oregon State University. Honors College
4
Peer Reviewed
No
19
Resource Type
Dissertation
9
Masters Thesis
7
Honors College Thesis
4
Rights Statement
In Copyright
20
Subject
Phase-locked loops
6
Analog-to-digital converters
3
Electronic noise
2
Frequency synthesizers
2
Modulators (Electronics)
2
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