Index Catalog // ScholarsArchive@OSU

A comparison of two types of zero-crossing FM demodulators for wireless receivers

Creator:: McNeal, Jeff D.
Abstract:: A comparison of two novel demodulators. The first is a basic zero crossing demodulator, as introduced by Beards. The second is an approach proposed by Hovin. The two demodulators are compared to each other and to the conventional method of demodulation.
Resource Type:: Masters Thesis

Modified conjugate gradient method for ADSL echo cancellation

Creator:: Inoue, Takao
Abstract:: In recent years, high speed data communications over twisted pair cables has gained tremendous demand. Asymmetric Digital Subscriber Line (ADSL) was standardized for use over twisted pair cables. A critical component in ADSL system is the echo canceller which is intended to discriminate unwanted echo signals caused by twisted pair...
Resource Type:: Masters Thesis

New results for differentially detected [pi]/4 DQPSK signal in a direct-conversion transceiver

Creator:: Scarpa, Maxime R.
Resource Type:: Masters Thesis

Distributed arithmetic architecture for the discrete cosine transform

Creator:: Poplin, Dwight
Abstract:: The Discrete Cosine Transform is used in many image and video compression standards. Many methods have been developed for efficiently computing the Discrete Cosine Transform including flowgraph algorithms, distributed arithmetic and two-dimensional decompositions. A new architecture based on distributed arithmetic is presented for computing the Discrete Cosine Transform and it's...
Resource Type:: Masters Thesis

Sensitivity analysis and architectural comparison of narrow-band sharp-transition digital filters

Creator:: Kulkarni, Satish S.
Abstract:: Due to advances in high-density low-cost VLSI and communication technology, digital filtering and signal processing are being widely used for real-time signal processing applications. Given the filter specification, choosing the best filter structure for a given application is not a trivial task. The choice of a particular filter structure depends...
Resource Type:: Masters Thesis

Design of an asynchronous third-order finite impulse response filter

Creator:: Oren, Joel A.
Abstract:: With the increased demand for complex digital signal processing systems, real-time signal processing requires higher throughput systems. In the past, the throughput has been increased by increasing the clock rates, but synchronization can become increasingly more difficult. Recently there has been renewed interest in designing asynchronous digital systems. In an...
Resource Type:: Masters Thesis

Adaptive noise cancellation for second-order delta-sigma A/D converters

Creator:: Bribech, Habib
Abstract:: Oversampled analog-to-digital (A/D) converter architectures have been receiving increased attention for high-precision A/D converters. These architectures offer the means of exchanging resolution in time for that in amplitude. Among these oversampled A/D converters, delta-sigma modulators are the most popular method used due to their simplicity in the analog circuitry. The...
Resource Type:: Masters Thesis

Adaptive correction techniques for delta-sigma A/D converters

Creator:: Abdennadher, Salem
Abstract:: Oversampling analog-to-digital and digital-to-analog converters are gaining more popularity in many signal processing applications. Delta-sigma modulators are used in practical applications of oversampling systems because of their apparent practical advantage over other oversampling converters in terms of insensitivity to the inevitable imperfection of the analog circuitry. In Δ∑ modulators, analog...
Resource Type:: Masters Thesis

VLSI implementation of adaptive BIT/serial IIR filters

Creator:: Badyal, Rajeev
Abstract:: A new structure for the implementation of bit/serial adaptive IIR filter is presented. The bit level system consists of gated full adders for the arithmetic unit and data latches for the data path. This approach allows recursive operation of the IIR filter to be implemented without any global interconnections, minimal...
Resource Type:: Masters Thesis

Low noise FSCL digital circuits for decimation filter

Creator:: Wong, Man Wa
Abstract:: A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed to implement the digital section of mixed-signal IC applications. This FSCL circuit technique offers the advantage of low overlap current spikes during the switching transitions of conventional CMOS gates. This overlap current spike has become one of...
Resource Type:: Masters Thesis

ScholarsArchive@OSU

A comparison of two types of zero-crossing FM demodulators for wireless receivers

Modified conjugate gradient method for ADSL echo cancellation

New results for differentially detected [pi]/4 DQPSK signal in a direct-conversion transceiver

Distributed arithmetic architecture for the discrete cosine transform

Sensitivity analysis and architectural comparison of narrow-band sharp-transition digital filters

Design of an asynchronous third-order finite impulse response filter

Adaptive noise cancellation for second-order delta-sigma A/D converters

Adaptive correction techniques for delta-sigma A/D converters

VLSI implementation of adaptive BIT/serial IIR filters

Low noise FSCL digital circuits for decimation filter

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