The new CMOS folded source-coupled logic (FSCL)
technique intended for mixed-mode integrated circuits has
been designed. It has advantages over conventional CMOS
circuit in terms of reduced current spike, circuit delay,
logic flexibility, and layout density. A simple CPU
implemented in 2 μm CMOS technology with a 5.0 volt supply...
Advances in VLSI array processing have led to many new
parallel structures for real-time Digital Signal Processing (DSP)
applications. Among all the architectures, systolic arrays have played
an important role because systolic arrays have regular, local
interconnections with modular structure. In ordinary systolic arrays,
however, all processing operations and data...
This thesis describes the development of a flash analog-to-digital converter based on
current-mode technique. The advantages of current -mode technique are higher speed,
smaller chip area, and simple division of reference current based on current mirror. A
current-mode comparator is designed consisting of a cascode current mirror and a
current...
Many systematic methods exist for mapping algorithms to processor arrays. The algorithm is usually specified as a set of recurrence equations, and the processor arrays are synthesized by finding timing and allocation functions which transform index points in the recurrences into points in a space-time domain. The problem of scheduling...
Fully efficient systolic arrays for the solution of Toeplitz
matrices using Schur algorithm [1] have been obtained. By applying
clustering mapping method [2], the complexity of the algorithm is
0(n) and it requires n/2 processing elements as opposed to n
processing elements developed elsewhere [1].
The motivation of this thesis...
A series of complex digital blocks have been designed and fabricated using the newly
developed current-mode differential CMOS logic family viz. the Folded Source-Coupled
Logic ( FSCL ). The main feature of this logic family is the low current spikes generated
during the switching transitions ( at least 2 orders...
This thesis describes the analysis and comparison of Folded Source-Coupled
Logic (FSCL) with standard static CMOS, cascode voltage-switch logic and differential
split-level logic gates. The advantages of FSCL are low switching noise and
high operating speed. The effect of voltage and device scaling on these topologies is
evaluated in terms...
A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed
to implement the digital section of mixed-signal IC applications. This FSCL circuit technique
offers the advantage of low overlap current spikes during the switching transitions
of conventional CMOS gates. This overlap current spike has become one of...
A new structure for the implementation of bit/serial adaptive IIR filter is
presented. The bit level system consists of gated full adders for the arithmetic
unit and data latches for the data path. This approach allows recursive
operation of the IIR filter to be implemented without any global
interconnections, minimal...
Oversampling analog-to-digital and digital-to-analog converters are gaining more
popularity in many signal processing applications. Delta-sigma modulators are used in practical applications of oversampling systems because of their apparent practical advantage over other oversampling converters in terms of insensitivity to the inevitable imperfection of the analog circuitry.
In Δ∑ modulators, analog...
Oversampled analog-to-digital (A/D) converter architectures have been receiving
increased attention for high-precision A/D converters. These architectures offer the
means of exchanging resolution in time for that in amplitude. Among these
oversampled A/D converters, delta-sigma modulators are the most popular method
used due to their simplicity in the analog circuitry. The...
With the increased demand for complex digital signal processing systems,
real-time signal processing requires higher throughput systems. In the past, the
throughput has been increased by increasing the clock rates, but
synchronization can become increasingly more difficult. Recently there has
been renewed interest in designing asynchronous digital systems. In an...
Due to advances in high-density low-cost VLSI and communication technology,
digital filtering and signal processing are being widely used for real-time signal processing
applications. Given the filter specification, choosing the best filter structure for a given
application is not a trivial task. The choice of a particular filter structure depends...
The Discrete Cosine Transform is used in many image and video compression
standards. Many methods have been developed for efficiently computing the Discrete
Cosine Transform including flowgraph algorithms, distributed arithmetic and
two-dimensional decompositions.
A new architecture based on distributed arithmetic is presented for computing
the Discrete Cosine Transform and it's...
In recent years, high speed data communications over twisted pair cables has gained
tremendous demand. Asymmetric Digital Subscriber Line (ADSL) was standardized for
use over twisted pair cables. A critical component in ADSL system is the echo canceller
which is intended to discriminate unwanted echo signals caused by twisted pair...
A comparison of two novel demodulators. The first is a basic zero crossing demodulator,
as introduced by Beards. The second is an approach proposed by Hovin. The two demodulators
are compared to each other and to the conventional method of demodulation.