Index Catalog // ScholarsArchive@OSU

A comparison of two types of zero-crossing FM demodulators for wireless receivers

Creator:: McNeal, Jeff D.
Abstract:: A comparison of two novel demodulators. The first is a basic zero crossing demodulator, as introduced by Beards. The second is an approach proposed by Hovin. The two demodulators are compared to each other and to the conventional method of demodulation.
Resource Type:: Masters Thesis

Adaptive correction techniques for delta-sigma A/D converters

Creator:: Abdennadher, Salem
Abstract:: Oversampling analog-to-digital and digital-to-analog converters are gaining more popularity in many signal processing applications. Delta-sigma modulators are used in practical applications of oversampling systems because of their apparent practical advantage over other oversampling converters in terms of insensitivity to the inevitable imperfection of the analog circuitry. In Δ∑ modulators, analog...
Resource Type:: Masters Thesis

Adaptive noise cancellation for second-order delta-sigma A/D converters

Creator:: Bribech, Habib
Abstract:: Oversampled analog-to-digital (A/D) converter architectures have been receiving increased attention for high-precision A/D converters. These architectures offer the means of exchanging resolution in time for that in amplitude. Among these oversampled A/D converters, delta-sigma modulators are the most popular method used due to their simplicity in the analog circuitry. The...
Resource Type:: Masters Thesis

Application and analysis of CMOS FSCL for mixed-mode analog/digital ICs

Creator:: Chow, Andrew Siv-Anne
Abstract:: The new CMOS folded source-coupled logic (FSCL) technique intended for mixed-mode integrated circuits has been designed. It has advantages over conventional CMOS circuit in terms of reduced current spike, circuit delay, logic flexibility, and layout density. A simple CPU implemented in 2 μm CMOS technology with a 5.0 volt supply...
Resource Type:: Masters Thesis

CMOS differential logic techniques for mixed-mode applications

Creator:: Chee, San-hwa
Resource Type:: Masters Thesis

Comparison and analysis of current-mode logic circuits with differential and static CMOS

Creator:: Shrivastava, Manu B.
Abstract:: This thesis describes the analysis and comparison of Folded Source-Coupled Logic (FSCL) with standard static CMOS, cascode voltage-switch logic and differential split-level logic gates. The advantages of FSCL are low switching noise and high operating speed. The effect of voltage and device scaling on these topologies is evaluated in terms...
Resource Type:: Masters Thesis

Current-mode flash analog-to-digital converter

Creator:: Maleki, Mohammad
Abstract:: This thesis describes the development of a flash analog-to-digital converter based on current-mode technique. The advantages of current -mode technique are higher speed, smaller chip area, and simple division of reference current based on current mirror. A current-mode comparator is designed consisting of a cascode current mirror and a current...
Resource Type:: Masters Thesis

Design of an asynchronous third-order finite impulse response filter

Creator:: Oren, Joel A.
Abstract:: With the increased demand for complex digital signal processing systems, real-time signal processing requires higher throughput systems. In the past, the throughput has been increased by increasing the clock rates, but synchronization can become increasingly more difficult. Recently there has been renewed interest in designing asynchronous digital systems. In an...
Resource Type:: Masters Thesis

Design of complex digital blocks using folded source-coupled logic for mixed-mode applications

Creator:: Maskai, Sailesh R.
Abstract:: A series of complex digital blocks have been designed and fabricated using the newly developed current-mode differential CMOS logic family viz. the Folded Source-Coupled Logic ( FSCL ). The main feature of this logic family is the low current spikes generated during the switching transitions ( at least 2 orders...
Resource Type:: Masters Thesis

Distributed arithmetic architecture for the discrete cosine transform

Creator:: Poplin, Dwight
Abstract:: The Discrete Cosine Transform is used in many image and video compression standards. Many methods have been developed for efficiently computing the Discrete Cosine Transform including flowgraph algorithms, distributed arithmetic and two-dimensional decompositions. A new architecture based on distributed arithmetic is presented for computing the Discrete Cosine Transform and it's...
Resource Type:: Masters Thesis

ScholarsArchive@OSU

A comparison of two types of zero-crossing FM demodulators for wireless receivers

Adaptive correction techniques for delta-sigma A/D converters

Adaptive noise cancellation for second-order delta-sigma A/D converters

Application and analysis of CMOS FSCL for mixed-mode analog/digital ICs

CMOS differential logic techniques for mixed-mode applications

Comparison and analysis of current-mode logic circuits with differential and static CMOS

Current-mode flash analog-to-digital converter

Design of an asynchronous third-order finite impulse response filter

Design of complex digital blocks using folded source-coupled logic for mixed-mode applications

Distributed arithmetic architecture for the discrete cosine transform

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