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Filtering by: Creator Long, L. E. Remove constraint Creator: Long, L. E. Advisor Mayaram, Kartikeya Remove constraint Advisor: Mayaram, Kartikeya Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering Degree Level Master's Remove constraint Degree Level: Master's

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  • Prediction of phase noise and jitter in ring oscillators

    Creator:
    Barton, Nathen
    Abstract:
    This thesis presents distinctly different methods of accurately predicting phase noise and absolute jitter in ring oscillators. The phase noise prediction methods are the commercially available SpectreRF and isf_tool, a simulator developed in this work from the Hajimiri and Lee theory of phase noise. Absolute jitter due to deterministic supply...
    Resource Type:
    Masters Thesis
    Full Text:
    Phase Noise 53 4.1.1. Three H&L series oscillators 54 4.1.2. Distributed oscillator layout 54 4.1.3

  • A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4 GHz LNA's

    Creator:
    Hazenboom, Duncan S.
    Abstract:
    Three types of low noise amplifiers operating at 2.4GHz were designed. They are the commonly used single-ended and differential amplifiers as well as a new quasi-differential amplifier. The substrate noise injected into these amplifiers is examined for both heavily and lightly doped CMOS substrates. For the single-ended amplifier the noise...
    Resource Type:
    Masters Thesis
    Full Text:
    -70 E O'.l :s, -80 :;; ~ a. -90 2.25 2.3 2.35 2.4 2.45 2.5 2.55 2.6 Frequency (Hz) X 10

  • A substrate noise coupling model for lightly doped CMOS processes

    Creator:
    Sadate, Aline C.
    Abstract:
    This thesis presents a design-oriented model for lightly doped CMOS substrates. The model predicts the substrate noise coupling between noisy digital and sensitive analog blocks in the early stages of the design. The model scales with the size and separation of these blocks and it is validated with device simulations...
    Resource Type:
    Masters Thesis
    Full Text:
    Chilakapati for the long useful discussions, Robert Batten for always taking the time to help with the tools

  • Modeling and simulation methods for RF MEMS VCOs

    Creator:
    Sankaranarayanan, Janakiram Ganesh
    Abstract:
    This work focusses on the modeling and the development of efficient coupled simulation techniques for MEMS based RF oscillators. High-level models for MEMS based varactors have been discussed and their accuracy issues are identified, based on comparisons with numerical simulations. A faster simulation approach based on the time-domain shooting method...
    Resource Type:
    Masters Thesis
    Full Text:
    , kfixed = 32EW ( t L )3 (2.8) where, E is the Young’s modulus of the material of the capacitor, and W

  • Contributions to substrate noise due to supply coupling and pin parasitics

    Creator:
    Adluri, Sirisha
    Abstract:
    This thesis presents the contributions to substrate noise due to supply coupling and the effect of pin parasitics on the substrate noise generated by digital circuits. Various sources of substrate noise and their effect on analog circuits sharing the same substrate are discussed. A simulation approach to isolate the various...
    Resource Type:
    Masters Thesis
    Full Text:
    : (W/L)1 = ljimIO.6jim, (W/L)1 = 2im/0.6j.tm, 5x: (W/L)1 = 5im/0.6jm, (W/L)1 = 10tm/0.6jim

  • Analysis and design of CMOS RF LNAs with ESD protection

    Creator:
    Chandrasekhar, Vinay
    Abstract:
    An analysis that accounts for the effect of standard electrostatic discharge (ESD) structures on critical LNA specifications of noise figure, input matching and gain is presented. It is shown that the ESD structures degrade LNA performance particularly for higher frequency applications. Two LNAs, one with ESD protection and one without,...
    Resource Type:
    Masters Thesis
    Full Text:
    .......................................... 22 3.2 Common Gate Amplifier ............................................ 24 L TABLE OF CONTENTS

  • Algorithms and tools for optimization of integrated RF VCOs

    Creator:
    Kratyuk, Volodymyr
    Abstract:
    This thesis presents algorithms and tools for the automated design of RF LC CMOS voltage controlled oscillators (VCOs) with low phase noise given a set of specifications. The electromagnetic solver, ASITIC, combined with the circuit simulator, SpectreRF, allows optimization of the VCO circuit parameters and inductor layout. This approach gives...
    Resource Type:
    Masters Thesis
    Full Text:
    ). Hk+l = Hk qq HSSkHk (2.11)qs SHkSk where 5k = Xk and q Vf(Xk+J ) Vf(Xk). 11 At a starting point

  • A comparison of substrate noise coupling in heavily doped and lightly doped substrates for mixed-signal circuits

    Creator:
    Ayers, James S.
    Abstract:
    An analysis of substrate noise coupling in mixed-signal circuits has been performed in the TSMC 0.25 [mu]m lightly doped and heavily doped CMOS processes. Methods to minimize noise coupling in both the chip design and board design phases are presented along with techniques for accurate circuit simulation of noise coupling....
    Resource Type:
    Masters Thesis
    Full Text:
    .......................................... 84 APPENDIX E Modeling Interconnect and Mutual Inductance ........... 88 Page 2.1 A cross section

  • A nano-power wake-up circuit for RF energy harvesting wireless sensor networks

    Creator:
    Lindsley, Christopher J.
    Abstract:
    A fully integrated CMOS latched comparator is presented for use as a wake-up circuit that is attached to an RF energy harvester in a battery free wireless sensor network. The system consumes less than 36nA static current at 20°C and dissipates 2pJ of energy per conversion. The comparator comprises of...
    Resource Type:
    Masters Thesis
    Full Text:
    𝑕 , and the channel length is sufficiently long, 𝐼𝐷 = 𝜇o𝐶ox𝑆𝑀 ⋅ 𝑛 − 1 ⋅ 𝑣𝑡𝑕 2 ⋅ 𝑒 𝑉𝐺𝑆

  • A methodology for efficient substrate noise estimation from large scale digital circuits in mixed signal SoC's

    Creator:
    Held, Martin A.
    Abstract:
    A methodology for rapid estimation of substrate noise generated by digital circuitry in mixed-signal circuits is presented. This methodology is incorporated into the Silencer! framework, and also provides for future improvements including pre-layout noise estimation. Measurements of a test chip fabricated in the TSMC o.25[mu]m heavily doped logic process validate...
    Resource Type:
    Masters Thesis
    Full Text:
    -10 -20 CD ~ -30 Q) -0 2 ·2 -40 Cl "' ::? E -50 2 &l -60 a. U) ~ -70 0 a.. -80