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Filtering by: Creator Busche, Jacob A. Remove constraint Creator: Busche, Jacob A. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Investigation of a noise-shaping accelerometer interface circuit for two-chip implementation

    Creator:
    Zechmann, Jacob W.
    Abstract:
    The world market for sensors is several hundred million dollars growing at an annual rate of 20 percent with accelerometers comprising 19 percent of the market. With an increasing market, a wide range of applications with varying degrees of resolution are in demand. Therefore, there is sufficient motivation for developing...
    Resource Type:
    Masters Thesis
    Full Text:
    by Jacob W. Zechmann June 30, 2005 All Rights Reserved _j Investigation of a Noise-Shaping

  • A continuous time frequency translating delta Sigma Modulator

    Creator:
    Pulincherry, Anurag
    Abstract:
    This thesis presents a continuous time bandpass delta sigma modulator with frequency translation inside the delta sigma loop. The input IF signal is down converted to baseband after amplification by a low Q, wideband bandpass resonator. The down converted IF signal is digitized by a continuous time, second order lowpass...
    Resource Type:
    Masters Thesis
    Full Text:
    : A Continuous Time Frequency Translating Delta Sigma Modulator. Abstract approved: Un-Moon This

  • High-speed switched-capacitor filters based on unity-gain buffers

    Creator:
    Bruneau, David
    Abstract:
    In this work a new voltage buffer, the drain-follower, achieves 300MHz band-width with 2pF load, a dc gain of 0.993V/V, 1mV offset voltage, -60 dB total harmonic distortion at 1.4Vpp output voltage and 6.5mW power dissipation from 5V supply. A unity-gain buffer switched-capacitor biquad filter has been implemented in 0.5μm...
    Resource Type:
    Masters Thesis
    Full Text:
    Switched-Capacitor Filters Based on Unity-Gain Buffers Abstract approved: Un-Ku Moon In this work a new

  • An efficient switched capacitor buck-boost voltage regulator using delta-sigma control loop

    Creator:
    Rao, Arun
    Abstract:
    Voltage converters or charge pumps find their use in many circuits. They are extensively used in hand held devices as cell phones, pagers, PDA's and laptops. Some of the important issues relating to design of voltage regulators for handheld devices are size, efficiency and noise. Another important factor to be...
    Resource Type:
    Masters Thesis
    Full Text:
    capacitor voltage regulator. An alternate architecture with a delta-sigma control loop to eliminate this

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    thesis describes the problems of extending bandwidth without losing accu- racy in z A/D converters, and

  • Design techniques for low-voltage analog-to-digital converter

    Creator:
    Chang, Dong-Young
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low-voltage conditions. There are several well-known techniques to bypass the problem. These approaches include: (1)...
    Resource Type:
    Dissertation
    Full Text:
    first design is a 10-bit 25MSPS pipelined ADC using pseudo-differential structure. It is fabricated in

  • Continuous time input pipeline ADCs

    Creator:
    Gubbins, David Patrick
    Abstract:
    Analog-to-digital converters (ADCs) convert analog continuous time signals into discrete time, digital format. One precondition that must be met for conventional nyquist rate ADCs is that the input signal must be suitably band-limited to an input bandwidth less than the nyquist frequency. This mandates expensive anti-alias filters which contribute to...
    Resource Type:
    Dissertation
    Full Text:
    input pipeline ADC eases a number of other challenges present in conventional switched capacitor ADCs

  • Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

    Creator:
    Guerber, Jon
    Abstract:
    In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
    Resource Type:
    Dissertation
    Full Text:
    and optimizes a full binary quanitzer structure for a Ternary MCS DAC. Residue Shaping is