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Filtering by: Creator Egeland%2C Dawn M. Remove constraint Creator: Egeland%2C Dawn M. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • High-speed switched-capacitor filters based on unity-gain buffers

    Creator:
    Bruneau, David
    Abstract:
    In this work a new voltage buffer, the drain-follower, achieves 300MHz band-width with 2pF load, a dc gain of 0.993V/V, 1mV offset voltage, -60 dB total harmonic distortion at 1.4Vpp output voltage and 6.5mW power dissipation from 5V supply. A unity-gain buffer switched-capacitor biquad filter has been implemented in 0.5μm...
    Resource Type:
    Masters Thesis
    Full Text:
    current of M6 which is mirrored to M by M5 and increases the bias current of the PMOS SF. In the PMOS SF

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis

  • Design techniques for low-voltage analog-to-digital converter

    Creator:
    Chang, Dong-Young
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low-voltage conditions. There are several well-known techniques to bypass the problem. These approaches include: (1)...
    Resource Type:
    Dissertation

  • Design of high-performance pipeline analog-to-digital converters in low-voltage processes

    Creator:
    Myers, Charles Grant
    Abstract:
    Pipeline analog-to-digital converters (ADCs) have long been used in high-speed systems for power-efficient data conversion. Broadband communication and video processing systems are placing high demands on converter accuracy and speed (above 14 bits and in the multiple-MHz range). The increasing converter requirements coupled with lower supply voltages in modern processes...
    Resource Type:
    Masters Thesis
    Full Text:
    STAGE 3 STAGE 4 M(n−1)+1M= # of stages including B.E. Vin S/H STAGE 1 B.E. A/D Vref DIGITAL

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
    Full Text:
    this setup, ”m” is the LMS fit parameter. The parameter m can be evaluated from Eq. 2.2 as given by Eq

  • Power-Efficient Design Techniques and Architectures for Scalable Submicron Analog Circuits

    Creator:
    Xu, Yang
    Abstract:
    As the CMOS process scales down to submicron, digital circuit performance improves, while reduced supply voltage and lower transistor intrinsic gain make it difficult to implement analog circuits in a power efficient manner. Therefore, it has become advantageous to shift more analog signal processing functions conventionally realized in voltage (analog)...
    Resource Type:
    Dissertation
    Full Text:
    0.18μm CMOS, and occupies a core area of 0.12mm2. Operating with a 1.3V supply voltage, the filter

  • Design of low OSR, high precision analog-to-digital converters

    Creator:
    Rajaee, Omid
    Abstract:
    Advances in electronic systems have lead to the demand for high resolution, high bandwidth Analog-to-Digital Converters (ADCs). Oversampled ADCs are well- known for high accuracy applications since they benefit from noise shaping and they usually do not need highly accurate components. However, as a consequence of oversampling, they have limited...
    Resource Type:
    Dissertation
    Full Text:
    DAC in DSM with a pipelined ADC as quan- tizer The modified version of the ∆Σ ADC with an M-stage

  • Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design

    Creator:
    Li, Jipeng
    Abstract:
    Pipelined analog to digital converters (ADCs) are very important building blocks in many electronic systems such as high quality video systems, high performance digital communication systems and high speed data acquisition systems. The rapid development of these applications is driving the design of pipeline ADCs towards higher speed, higher dynamic...
    Resource Type:
    Dissertation
    Full Text:
    OUTPUT 1b In-b Inb ANALOG..H SAM PUNG STAGE 1 ] STAGEj_ .... H STAGE m Fig.2. 1 A typical pipelined

  • Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

    Creator:
    Guerber, Jon
    Abstract:
    In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
    Resource Type:
    Dissertation
    Full Text:
    ............................................ 154 1 1. INTRODUCTION Since the dawn of time, man has been trying to quantify

  • Power-efficient two-step pipelined analog-to-digital conversion

    Creator:
    Lee, Ho-Young
    Abstract:
    Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which...
    Resource Type:
    Dissertation
    Full Text:
    made in the past 5 years using sub-micron technologies less than 0.13 m. A pipelined ADC is the