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Filtering by: Creator Hyskell, C. M. Remove constraint Creator: Hyskell, C. M. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    Cyclic Analog-Digital Converters. Abstract approved: Gabor C. Temes and Un-Ku Moon This thesis

  • A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications

    Creator:
    Xiao, Ying
    Abstract:
    A novel switched-R-MOSFET-C input branch is proposed for low-voltage and high-linearity applications. The tunability is achieved by varying the clock duty cycle using an automatic tuning circuit. This tuning method does not involve a change in gate voltage, and is therefore particularly suitable for low-voltage applications. The advantages of the...
    Resource Type:
    Masters Thesis
    Full Text:
    , 2004 . Title: A Tunable Duty-Cycle-Controlled Switched-R-MOSFET-C CMOS Filter for Low-Voltage and

  • Design of high efficiency step-down switched capacitor DC/DC converter

    Creator:
    Ma, Mengzhe
    Abstract:
    Recently, switched capacitor DC/DC converters are extensively used in portable electronic devices because they feature many advantages, such as high efficiency, small package, low quiescent current, minimal external components and low cost. In this thesis, two step-down switched capacitor DC/DC converters are designed. One has the fixed output options 1.5V,...
    Resource Type:
    Masters Thesis
    Full Text:
    High Efficiency Step-Down Switched Capacitor DC/DC Converter Abstract approved: Gábor C. Temes Un-Ku

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis
    Full Text:
    . Title: A 10 Bit Algorithmic A/D Converter for a Bio-sensor Abstract approved: Gabor C. Temes and Un-Ku

  • Power efficient analog-to-digital converters using both voltage and time domain information

    Creator:
    Oh, Taehwan
    Abstract:
    As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs is strongly increased. Recently, time-domain quantization has drawn attention from its scalability in deep submicron CMOS processes. Furthermore, there are several interesting aspects of time-domain...
    Resource Type:
    Dissertation
    Full Text:
    . The measured results of the prototype ADC implemented in a 0.13μm CMOS demonstrate peak SNDR of

  • A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

    Creator:
    Wang, Xuesheng
    Abstract:
    This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
    Resource Type:
    Dissertation
    Full Text:
    Delta Sigma ADCs. Gabor C. Temes and Un-Ku This thesis proposes a novel fully digital technique for

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    : High-Performance Delta-Sigma Analog-to-Digital Converters. Abstract approved: Gdbor C. Temes tin-Ku

  • Fast opamp-free delta sigma modulator

    Creator:
    Thomas, Daniel E.
    Abstract:
    Switched-capacitor (SC) circuits are commonly used for analog signal processing because they can be used to realize precision filters and data converters on an integrated circuit (IC). However, for high speed applications SC circuit operating speeds are limited by the internally-compensated opamps found in SC integrators, a common building block...
    Resource Type:
    Masters Thesis
    Full Text:
    -Free Delta Sigma Modulator. Abstract approved: Un-Ku Moon/Gábor C. Temes Switched-capacitor (SC

  • A multi-bit delta sigma audio digital-to-analog converter

    Creator:
    Wang, Ruopeng
    Abstract:
    Digital-to-analog converters (DACs) with wide dynamic range and high linearity are required for high-end audio applications. A multi-bit delta sigma audio DAC, using a novel gain-correction technique, is described in this thesis. For widely varying on-chip RC time constant, the DAC gain can be accurately controlled by the correction circuitry....
    Resource Type:
    Dissertation
    Full Text:
    -Bit Delta Sigma Audio Digital-to-Analog Converter Abstract approved: Gabor C. Temes Un-Ku Moon

  • Active Noise Shaping Analog-to-Digital Data Converters

    Creator:
    Shi, Lukang
    Abstract:
    Successive-approximation-register (SAR) analog-to-digital converters are popular for medium accuracy, medium speed and low power applications, such as in biomedical applications. They have low latency and simple architecture compared with ΔΣ ADCs. This is because of SAR ADCs’ binary searching scheme. Furthermore, SAR ADCs can apply oversampling and noise shaping schemes...
    Resource Type:
    Dissertation
    Full Text:
    : ______________________________________________________ Gabor C. Temes Successive-approximation-register (SAR) analog-to-digital