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Filtering by: Creator Steiner, J. J. Remove constraint Creator: Steiner, J. J. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Low power high resolution data converter in digital CMOS technology

    Creator:
    Zheng, Zhiliang
    Abstract:
    The advance of digital IC technology has been very fast, as shown by rapid development of DSP, digital communication and digital VLSI. Within electronic signal processing, analog-to-digital conversion is a key function, which converts the analog signal into digital form for further processing. Recently, low-voltage and low-power have become also...
    Resource Type:
    Masters Thesis
    Full Text:
    thanks to Prof. Robert J. Schultz of Civil, Construction, & Environmental Engineering Department for

  • Digital implementation of a mismatch-shaping successive-approximation ADC

    Creator:
    Coe, Matthew T.
    Abstract:
    Utilizing a two-capacitor topology, the digital implementation of an audio-band successive-approximation analog-to-digital converter (ADC) is explored in the context of mismatch-shaping where the mismatch estimates are accurate to the first order. A second-order Δ∑ loop was found to be effective in system simulations given a 0.1% capacitor mismatch. Spectral analysis...
    Resource Type:
    Masters Thesis
    Full Text:
    . When the data bit is a 0, 'J is closed and the charge is dumped to ground. During the second phase, (2

  • Area efficient D/A converters for accurate DC operation

    Creator:
    Greenley, Brandon Royce
    Abstract:
    The design of mixed-signal integrated circuits has evolved from simple analog and digital circuits operating on the same silicon substrate to the point that now we have complete system on a chip solutions for communication systems. The levels of integration needed to remain cost effective in today's integrated circuit (IC)...
    Resource Type:
    Masters Thesis
    Full Text:
    reference once again. 3/4 Cl) -J 0 1/4 Ideal / / / 00 01 10 11 Input Code FIGURE 2.1: 2-Bit

  • 20-stage pipelined ADC with radix-based calibration

    Creator:
    Yun, Chong Kyu
    Abstract:
    A radix-based calibration technique was previously proposed with a two-stage algorithmic analog-to-digital converter (ADC). The objective of this work is to verify the capability of radix-based calibration for a true multi-stage ADC. In order to prove the idea, a single bit-per-stage, 20-stage pipelined ADC is designed in a 0.35-μm CMOS...
    Resource Type:
    Masters Thesis
    Full Text:
    function is as follows: I2.[vJN VREF VRES 2 J if VIN 0, D=1 (2.2) 2 [VIN VF if VIN <0, D =02) A

  • Design techniques for clocking high performance signaling systems

    Creator:
    Hanumolu, Pavan Kumar
    Abstract:
    Scaling of CMOS technology has progressed relentlessly for the past several decades. In order for this unprecedented scaling to benefit the performance of large digital systems, the communication bandwidth between integrated circuits (ICs) must scale accordingly. However, interconnect technology does not scale as aggressively, making communication between chips the major...
    Resource Type:
    Dissertation
    Full Text:
    Output phase noise contribution from individual noise sources (σj = 7.5ps, ∆FP = 4MHz, ∆FI = 12MHz, M=3

  • Next generation analog-to-digital conversion using time-based encoding and digital synthesis techniques

    Creator:
    Muhlestein, Jason, Russell
    Abstract:
    The internet-of-things is a growing market segment which is based on an arrayof portable communication devices with high power efficiency. Advanced semiconductortechnology can easily improve their digital performance, but the samecannot be said for the analog blocks which are vital to their operation. Highperformance analog circuits continue to use conventional...
    Resource Type:
    Dissertation

  • A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

    Creator:
    Wang, Xuesheng
    Abstract:
    This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
    Resource Type:
    Dissertation
    Full Text:
    2.1 FS = v(k) 11 I u(k) 'U') Li9LLsJ!J q(k) t VLSB/2RNNNI -VLsB/2 Figure 2-2 Quantization noise

  • Design techniques for low-voltage analog-to-digital converter

    Creator:
    Chang, Dong-Young
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low-voltage conditions. There are several well-known techniques to bypass the problem. These approaches include: (1)...
    Resource Type:
    Dissertation
    Full Text:
    three major reasons to scale MOS transistor. The first reason is that the cutoff frequency (J.) of the

  • A Wide Modulation Range and PVT-Tolerant Spread-Spectrum Modulation Clock Generator

    Creator:
    Sun, Hyuk
    Abstract:
    This dissertation presents a phase domain in-loop-bandwidth spread-spectrum clock generation technique. In this proposed technique, a charge-based discrete-time loop filter is proposed to enable the phase domain in-loop-bandwidth spread-spectrum modulation without a delta-sigma modulator or time-to-digital converter. The in-loop-bandwidth modulation technique maximizes the loop bandwidth to improve phase noise suppression...
    Resource Type:
    Dissertation
    Full Text:
    modulation. The output of the clock (VOUT(t)) is written as: OUT OUT n OUT SSC_ rate n V (t) A J ( ) cos

  • Low noise clocking for high speed serial links

    Creator:
    Brownlee, Merrick
    Abstract:
    As the functionality of digital chips continues to increase dramatically, chip- to-chip communication bandwidths must scale accordingly to avoid constraining the overall system performance. Therefore, high speed transceiver design has be- come an important research topic. In particular, the performance of the circuits that are responsible for timing accuracy are...
    Resource Type:
    Dissertation