Due to the present trend to utilize both virtual memory and
paging for the implementation of storage for large-scale computer
systems, it is of interest to analyze the pertinent parameters
associated with the operation of a paging system. This paper
describes the paging process and determines the effect of variations...
A high speed adaptive signal processing concept and several high
speed adaptive logic circuit elements are presented.
The adaptive signal processing system operates in a "goal" oriented
mode; the system tries to optimize its characteristics to
achieve a given goal in spite of unforeseen variations in the inputs,
the system,...
The High Temperature Lattice Test Reactor (HTLTR) at Richland,
Washington, operates at temperatures up to 1000°C. Its low nuclear
power requires a 384 kilowatt electrical heating system, that is
divided into four circuits, to attain the high temperatures in the
ten-foot cube of moderating graphite. This thesis describes the
design...
The development of new electronic devices and design procedures
applicable to ternary switching circuits suggests that it might be desirable
to use ternary arithmetic in direct digital control systems.
The advantages of decimal, binary, and ternary arithmetic in digital
computers are discussed and a set of rules for signed -digit...
Methods for mathematically modeling digital networks and
for constructing a digital network simulator are presented in this
paper. Two simulator programs have been written in FORTRAN
for the CDC 3300 Computer system: one for analyzing the behavior
of a typical combinational network, and one for analyzing the
behavior of a...
In view of recent developments in large-scale, complex digital systems, it is of interest to broaden the study of two-leveled logical systems to the study of three-leveled systems. This paper introduces the ternary logic system and develops a design approach for ternary digital systems that is based on familiar binary...
This thesis discusses a method of fast multiplication by parallel
addition of summands. A logical element that performs this parallel
addition is defined, and examples of the element realized with threshold
logic are shown. Relations between the type of logical element
used, and the speed and cost of the multiplier...
A complete procedure of minimizing input logic in designing
both completely and incompletely specified synchronous, finite state
sequential networks is presented in detail. This procedure consists
of three important steps: 1) state simplification, 2) state assignment
and 3) input logic realization. Two new ideas are presented
in the procedure of...
The emergence of the three-input majority gate as a practical element for logical design has demanded a useful method of design using these elements. In order to facilitate the use of this gate, a digital computer program is presented to implement the design procedure. Utilizing the truth table of a...