Index Catalog // ScholarsArchive@OSU

Interaction of the discharge mechanisms in A-C corona

Creator:: Pearson, Gary Arthur
Resource Type:: Masters Thesis
Full Text:: Interaction Of The Discharge Mechanisms In A-C Corona

A computer control algorithm for a nuclear reactor support system

Creator:: Kosorok, John Roger
Abstract:: The High Temperature Lattice Test Reactor (HTLTR) at Richland, Washington, operates at temperatures up to 1000°C. Its low nuclear power requires a 384 kilowatt electrical heating system, that is divided into four circuits, to attain the high temperatures in the ten-foot cube of moderating graphite. This thesis describes the design...
Resource Type:: Dissertation
Full Text:: error, m(t) c manipulated variable, KPB proportional gain, TI integral time constant, TD derivative

The measurement of metal temperature by an electromagnetic induction method

Creator:: Libby, Hugo L.
Resource Type:: Masters Thesis
Full Text:: O l D 0 0 v ] ( J ) U l j : C i ) U U U t i ) K 3 M I O I O I O I - ' l - ' h , l - ' l

Simulation and systems analysis of the United States softwood plywood industry

Creator:: Manetsch, Thomas Jerome
Resource Type:: Dissertation
Full Text:: variable is a part (M, P, C -D, L, O, or K). Second Digit. The second letter designates the nature of

Majority logic circuits

Creator:: Anand, Satish Kumar
Abstract:: This thesis considers the worst-case design of transistor circuits for the realization of Majority Logic. First the meaning of Majority Logic is discussed. The requirement of an odd number of inputs for the realization of Majority Logic is justified. The usefulness of Majority Logic in synthesizing a Boolean expression is...
Resource Type:: Masters Thesis
Full Text:: majority -logic truth table A B C M o o o o o o 1 o o 1 o o o 1 1 1 1 o o o 1 o 1 1 1 1 o 1

Comparison of rounding errors, CPU time and memory requirements of eleven integration formulas

Creator:: Sun, Keong-wah Gary
Abstract:: The worst case analysis of rounding error of eleven numerical quadrature formulas on a computer with floating-point arithmetic, base b, and t digit mantissa is calculated. These results are applied to five different integrands using the digital computer CDC 3300 located at Oregon State University. Central processing unit computing time,...
Resource Type:: Masters Thesis
Full Text:: that lx. 1 I <M and let C 0 = 1 then I Error 1 < 1.1*b 1-t i= 1,2,3,4 *(3+3+2) < 1.1*bl -t*M2*(8

The GALAXY memory system

Creator:: Looney, James Chester
Abstract:: The GALAXY computer is a large, high speed, general purpose, digital computer intended to be used for solving scientific problems. It requires a random access memory system of 16,384 words of 59 bits each with a cycle time of one microsecond or less. A memory system capable of meeting these...
Resource Type:: Masters Thesis
Full Text:: wH " pq • a ) cji a 4-1 N a eh H r-- m o o o o o i ^ ^ u j H c o ^ o j m m ^ ^ >"- ^ H O O O

Overexcited operation of distribution transformers

Creator:: Chaney, Thomas N.
Abstract:: This paper is the result of extensive experiments, investigating the effect on typical distribution transformers when operated overexcited as much as 117% of their rated voltage.
Resource Type:: Research Paper
Full Text:: 11induct.ive kick 11 method of test using a three volt battery and a d-c voltmeter. Turns Ratio: A check

Design, construction and operation of an inter-city microwave network for the Oregon educational television system

Creator:: Ballard, Benjamin J.
Resource Type:: Masters Thesis
Full Text:: s 3 . A n t e n n a S y s t e m G a i n 2 I 4. F r e e S p a c e L o s s * 5 . A n t e n n a S y

Minimizing input logic for a sequential network

Creator:: Peng, Te-fu
Abstract:: A complete procedure of minimizing input logic in designing both completely and incompletely specified synchronous, finite state sequential networks is presented in detail. This procedure consists of three important steps: 1) state simplification, 2) state assignment and 3) input logic realization. Two new ideas are presented in the procedure of...
Resource Type:: Masters Thesis
Full Text:: = {S , S , S } 1 2 m c Z LI 2 =1,Z Z12 "' Z12' mn} Table II. Sequential network expressed by a

ScholarsArchive@OSU

Interaction of the discharge mechanisms in A-C corona

A computer control algorithm for a nuclear reactor support system

The measurement of metal temperature by an electromagnetic induction method

Simulation and systems analysis of the United States softwood plywood industry

Majority logic circuits

Comparison of rounding errors, CPU time and memory requirements of eleven integration formulas

The GALAXY memory system

Overexcited operation of distribution transformers

Design, construction and operation of an inter-city microwave network for the Oregon educational television system

Minimizing input logic for a sequential network

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