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  • High-linearity switched-capacitor circuits in digital CMOS technologies

    Creator:
    Yoshizawa, Hirokazu
    Abstract:
    In this thesis, novel design techniques have been proposed for implementing high-linearity SC circuits in a standard digital CMOS process. They use nonlinear MOSFET capacitors instead of linear double-poly capacitors. To reduce their nonlinearities, a bias voltage is applied to keep MOSFET capacitors in their accumulation regions. For further reduction...
    Resource Type:
    Dissertation
    Full Text:
    capacitors in CMOS technology. It begins with a description of capacitors available in analog and digital

  • Low-Power 12-bit Quasi-Passive Segmented DAC Implemented in 130nm CMOS Technology

    Creator:
    Pierce, Alexander G.
    Abstract:
    This thesis work proposes a low-power 12-bit digital-to-analog converter (DAC) designed in a 130nm process. The DAC to be presented is of a segmented design where the architecture is split into pipelined and thermometer coded segments. This allows for high linearity and low distortion while maintaining high speed and low...
    Resource Type:
    Masters Thesis
    Full Text:
    Alexander Glenn Pierce for the degree of Master of Science in Electrical and Computer Engineering

  • A multi-bit delta sigma audio digital-to-analog converter

    Creator:
    Wang, Ruopeng
    Abstract:
    Digital-to-analog converters (DACs) with wide dynamic range and high linearity are required for high-end audio applications. A multi-bit delta sigma audio DAC, using a novel gain-correction technique, is described in this thesis. For widely varying on-chip RC time constant, the DAC gain can be accurately controlled by the correction circuitry....
    Resource Type:
    Dissertation
    Full Text:
    __________________________________________________________________ Director of School of Electrical Engineering and Computer Science

  • Low-power successive approximation analog to digital converter with digital calibration

    Creator:
    Li, Wei
    Abstract:
    IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
    Resource Type:
    Dissertation
    Full Text:
    -bit ADC in 65-nm CMOS with split capacitor array DAC," IEEE Journal of Solid-State Circuits, vol. 42

  • A study of basic building blocks of analog-to-digital delta-sigma modulators

    Creator:
    Guo, Yuhua
    Abstract:
    In this thesis, a novel Direct-Charge-Transfer (DCT) integrator structure is proposed, which can settle much faster than regular switch-capacitor integrators. A new Spread-Spectrum Dynamic Element Matching (SS-DEM) algorithm is also introduced, which can effectively spread or shape the nonlinearity error of multi-bit DAC in the feedback path, thus improve the...
    Resource Type:
    Masters Thesis
    Full Text:
    of Science in Electrical and Computer Engineering presented on January 9, 2004. Title: A Study of

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
    Full Text:
    and Computer Science Dean of the Graduate School I understand that my

  • Low-power high-linearity digital-to-analog converters

    Creator:
    Kuo, Ming-Hung
    Abstract:
    In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB) + 6 (MSB) segmented architecture to achieve high performance for minimum area. The implemented LSB DAC is based on quasi-passive pipelined DAC that has been...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF Ming-Hung Kuo for the degree of Master of Science in Electrical and

  • Design techniques of high-performance switched capacitor circuits in the presence of component imperfections

    Creator:
    Huang, Yunteng
    Abstract:
    This thesis describes design techniques for high-performance switched-capacitor (SC) circuits, primarily for high-linearity low-noise SC circuits in the presence of component imperfections, such as nonlinear op-amp voltage transfer characteristics, capacitor nonlinearities as well as the finite op-amp dc gain and op-amp offset and noise. Various correlated-double-sampling (CDS) schemes are discussed,...
    Resource Type:
    Dissertation
    Full Text:
    of basic CMOS technology for fabrication has become more and more desirable. Although low supply

  • Low-voltage data converters

    Creator:
    Meng, Qingdong
    Abstract:
    With the growing demand for portable/consumer electronics, such as digital audio/video (AV), the downscaling of device dimensions, which enables the integration of an increasing number of transistors in a single chip, is mandatory. This trend also continuously pushes the power supply voltage down to reduce the power consumption and improve...
    Resource Type:
    Dissertation
    Full Text:
    Electrical Engineering and Computer Science Dean of the Graduate School I understand

  • Low-power high-resolution delta-sigma ADC design techniques

    Creator:
    Wang, Tao
    Abstract:
    This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to the conventional active adder, the direct charge transfer (DCT) adder greatly saves power by keeping the feedback factor of the active adder unity. However, the...
    Resource Type:
    Dissertation
    Full Text:
    converter with offset and charge injection compensation,” IEEE Journal of Solid-State Circuits, vol. 23