Search Constraints

Start Over
Filtering by: Creator Lee, W. M. Remove constraint Creator: Lee, W. M. Advisor Temes, Gabor C. Remove constraint Advisor: Temes, Gabor C.

Search Results

  • High efficiency delta-sigma modulation data converters

    Creator:
    Lee, Kyehyung
    Abstract:
    Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
    Resource Type:
    Dissertation
    Full Text:
    AN ABSTRACT OF THE DISSERTATION OF Kyehyung Lee for the degree of Doctor of Philosophy in

  • Active Noise Shaping Analog-to-Digital Data Converters

    Creator:
    Shi, Lukang
    Abstract:
    Successive-approximation-register (SAR) analog-to-digital converters are popular for medium accuracy, medium speed and low power applications, such as in biomedical applications. They have low latency and simple architecture compared with ΔΣ ADCs. This is because of SAR ADCs’ binary searching scheme. Furthermore, SAR ADCs can apply oversampling and noise shaping schemes...
    Resource Type:
    Dissertation
    Full Text:
    Anand and Professor Yun-Shik Lee to be the committees of all my PhD exams. Their valuable comments

  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    never have materialised. I also want to thank Prof. Huaping Liu, Roger Traylor and Prof. William M

  • Low-power high-linearity digital-to-analog converters

    Creator:
    Kuo, Ming-Hung
    Abstract:
    In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB) + 6 (MSB) segmented architecture to achieve high performance for minimum area. The implemented LSB DAC is based on quasi-passive pipelined DAC that has been...
    Resource Type:
    Masters Thesis
    Full Text:
    Chen, Rishi Gupta, Young Ho Jung, Sang Hyeon Lee, Wei Li, Jiaming Lin, Xin Meng, Weilun Shen, Tao

  • Noise coupling techniques in multi-cell delta-sigma modulators

    Creator:
    Bonu, Madhulatha
    Abstract:
    High performance multi-cell delta-sigma modulators are a preferred choice in applications which require programmability. Multi-cell delta-sigma modulators with M unit cells provide 10log10(M) SQNR improvement for the same thermal noise and bias power due to the uncorrelated quantization noises of the M unit ADCs. This concept is used in this...
    Resource Type:
    Masters Thesis
    Full Text:
    in applications which require programmability. Multi-cell delta-sigma modulators with M unit

  • A study of basic building blocks of analog-to-digital delta-sigma modulators

    Creator:
    Guo, Yuhua
    Abstract:
    In this thesis, a novel Direct-Charge-Transfer (DCT) integrator structure is proposed, which can settle much faster than regular switch-capacitor integrators. A new Spread-Spectrum Dynamic Element Matching (SS-DEM) algorithm is also introduced, which can effectively spread or shape the nonlinearity error of multi-bit DAC in the feedback path, thus improve the...
    Resource Type:
    Masters Thesis
    Full Text:
    ) Spectra of y, the input to the DAC; (b) Spectra of Y2, the output of the DAC; (c) Spectra of m, the output

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis

  • The design of delta-sigma modulators for multi-standard RF receivers

    Creator:
    Liu, Mingliang
    Abstract:
    The transition from second-generation (2G) to third-generation (3G) wireless cellular and cordless telephone systems requires multi-standard adaptability in a single RF receiver equipment. An important answer to this request is the use of Delta-Sigma modulators for IF-to-baseband conversion, which will satisfy the dynamic range requirements for digital signal processing, and...
    Resource Type:
    Masters Thesis
    Full Text:
    model of a first-order modulator 18 3.2: First-order noise shaping 19 3.3: Cascade-of-Integrators w

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    Xiao, Anurag Pulincherry, Jipeng Li, Mustafa Keskin, Dong-Young Chang, Kye- Hyung Lee, Younjae Kook

  • Compensation techniques for cascaded delta-sigma A/D converters and high-performance switched-capacitor circuits

    Creator:
    Sun, Tao
    Abstract:
    This thesis describes compensation techniques for cascaded delta-sigma A/D converters (ADCs) and high-performance switched-capacitor (SC) circuits. Various correlated-double-sampling (CDS) techniques are presented to reduce the effects of the nonidealities, such as clock feedthrough, charge injection, opamp input-referred noise and offset, and finite opamp gain, in SC circuits. A CDS technique...
    Resource Type:
    Dissertation
    Full Text:
    vn to vont in the frequency domain is given by IHnI = 2 . (coT s m -T1 (2.2) Since Hn is a high