This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the noise performance of the incremental ADC, and a new optimization technique was proposed to minimize the output noise.
In the calibration mode, the incremental ADC...
Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are widely used in wireless transceivers. Recently, continuous-time (CT) ΔΣ ADCs gain growing interest in wireless applications for their lower power consumption and wider input bandwidth as compared with the discrete-time (DT) counterparts.
In this thesis, a wideband low-power CT ΔΣ modulator for next generation...
This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to the conventional active adder, the direct charge transfer (DCT) adder greatly saves power by keeping the feedback factor of the active adder unity. However, the...
Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems,high-definition television and radar systems. There are two general realizations...
High speed and high resolution analog-to-digital converter is a key building block for broadband wireless communications, high definition video applications, medical images and so on. By leveraging the down scaling of the latest CMOS technology and the noise shaping properties, delta-sigma (ΔΣ) ADCs are able to achieve wide-band operation and...
Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...