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Filtering by: Creator Kamvar, Z. N. Remove constraint Creator: Kamvar, Z. N. Contributor advisor sim Moon, Un-Ku Remove constraint Contributor advisor sim: Moon, Un-Ku Committee Member Hanumolu, Pavan Kumar Remove constraint Committee Member: Hanumolu, Pavan Kumar

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  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    different 14 H(s) H(z) xCT(t)=0 YCT xDT(t)=0 YDT DAC DAC TS vCT(n) vDT(n) H(z)DAC vDT(n)H(s)DAC

  • Digital phase-locked loops for multi-GHz clock generation

    Creator:
    Kratyuk, Volodymyr
    Abstract:
    A digital implementation of a PLL has several advantages compared to its analog counterpart. These include easy scalability with process shrink, elimination of the noise susceptible analog control for a voltage controlled oscillator (VCO) and the inherent noise immunity of digital circuits. Several recent digital PLL (DPLL) implementations have achieved...
    Resource Type:
    Dissertation
    Full Text:
    gain of the CPPLL in Fig. 2.4 is given by: LG(s) = ICP 2π KV CO s 1 N s + ωz s R (2.7) where ωz

  • Design techniques for time based data converters

    Creator:
    Gande, Manideep
    Abstract:
    Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data converters which use time based processing. Another artifact of geometry scaling is the increase in complexity of digital circuitry available on traditional analog ICs, as...
    Resource Type:
    Dissertation
    Full Text:
    tone frequency response of ideal and non-ideal ADC. . . . . . . 75 5.2 Relationship between DS3[n] and

  • Automated synthesis of analog to digital conversion

    Creator:
    Weaver, Skyler
    Abstract:
    This thesis describes circuit architectures and techniques that facilitate the automatic synthesis and fabrication of analog-to-digital converters (ADCs). Since automated synthesis already exists for digital circuits and is part of the digital circuit design flow, this work demonstrates the feasibility of ADC synthesis with little or no modification to presently...
    Resource Type:
    Dissertation
    Full Text:
    1 Normalized input N o rm a li z e d o u tp u t n=10000 n=64 n=16 Figure 3.2

  • Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits

    Creator:
    Kurahashi, Peter
    Abstract:
    A duty-cycle controlled switched resistor is a tunable resistive element that uses pulse width modulation as the method of tuning. This thesis will describe the operation of switched resistors and propose several circuit architectures that are well suited to the use of switched resistors. These architectures include filters, mixers, and...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 5.4.1 Z-Domain Transfer Function - H(z) . . . . . . . . . . . . . . . . . . . . . . . 88 5.4.2

  • Low power design techniques for analog-to-digital converters in submicron CMOS

    Creator:
    Musah, Tawfiq
    Abstract:
    Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially...
    Resource Type:
    Dissertation
    Full Text:
    L en g th [ n m ] Gate Length Figure 1.1: 2009 International Technology Roadmap for

  • Automated analysis, design, and optimization of low noise oscillators

    Creator:
    Vytyaz, Igor
    Abstract:
    Low noise oscillators are universally needed in digital systems for clock generation and synchronization, and in radio-frequency communication front-ends for frequency up- and down-conversion. Noise in oscillators results in timing jitter, and limits the clock frequency of digital systems. In radio-frequency communication systems, phase noise in oscillators lowers the signal-to-noise...
    Resource Type:
    Dissertation
    Full Text:
    numbers are the iteration count N DEC and N S of the PSS-DEC anal- ysis and the search-based method

  • Continuous time input pipeline ADCs

    Creator:
    Gubbins, David Patrick
    Abstract:
    Analog-to-digital converters (ADCs) convert analog continuous time signals into discrete time, digital format. One precondition that must be met for conventional nyquist rate ADCs is that the input signal must be suitably band-limited to an input bandwidth less than the nyquist frequency. This mandates expensive anti-alias filters which contribute to...
    Resource Type:
    Dissertation
    Full Text:
    . The ADC outputs a finite number of digital values, equal to 2N , where N is the resolution in bits of

  • Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps

    Creator:
    Gregoire, B. Robert
    Abstract:
    This thesis presents methods to reduce the effects of finite opamp DC gain, output voltage swing limitations in opamps, and component mismatches. The primary contribution of this thesis is a new switched-capacitor method named correlated level shifting (CLS). CLS enables true rail-to-rail operation by storing an estimate of the desired...
    Resource Type:
    Dissertation
    Full Text:
    operation beyond the rail. It also achieves the gain of an N-stage amplifier with N/2 stages. These