Search Constraints

Start Over
Filtering by: Subject Integrated circuits -- Very large scale integration Remove constraint Subject: Integrated circuits -- Very large scale integration Committee Member Bose, Bella Remove constraint Committee Member: Bose, Bella

Search Results

  • Efficient decoder design for error correction codes

    Creator:
    He, Jinjin
    Abstract:
    Error correction codes (ECCs) have been widely used in communication systems and storage devices. Nowadays, the rapid development of integrated circuit technologies makes feasible the implementation of powerful ECCs such as turbo code and low-density parity-check (LDPC) code. However, these high-performance codes require complex decoding algorithms, resulting in large hardware...
    Resource Type:
    Dissertation
    Full Text:
    systems [1]. Historically, very-large-scale integration (VLSI) technique plays an important role for the

  • Low-complexity high-speed VLSI design of low-density parity-check decoders

    Creator:
    Cui, Zhiqiang
    Abstract:
    Low-Density Parity-check (LDPC) codes have attracted considerable attention due to their capacity approaching performance over AWGN channel and highly parallelizable decoding schemes. They have been considered in a variety of industry standards for the next generation communication systems. In general, LDPC codes achieve outstanding performance with large codeword lengths (e.g.,...
    Resource Type:
    Dissertation
    Full Text:
    complexity of typical decoding algorithm such as MLD becomes very large as codeword length or encoder