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  • Ring amplification for switched capacitor circuits

    Creator:
    Hershberg, Benjamin Poris
    Abstract:
    A comprehensive and scalable solution for high-performance switched capacitor amplification is presented. Central to this discussion is the concept of ring amplification. A ring amplifier is a small modular amplifier derived from a ring oscillator that naturally embodies all the essential elements of scalability. It can amplify with accurate rail-to-rail...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.4 Troubling Trends

  • Design of low OSR, high precision analog-to-digital converters

    Creator:
    Rajaee, Omid
    Abstract:
    Advances in electronic systems have lead to the demand for high resolution, high bandwidth Analog-to-Digital Converters (ADCs). Oversampled ADCs are well- known for high accuracy applications since they benefit from noise shaping and they usually do not need highly accurate components. However, as a consequence of oversampling, they have limited...
    Resource Type:
    Dissertation
    Full Text:
    2.4 The 0-∆Σ MASH modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

  • Architectural compensation techniques for analog inaccuracies in delta-sigma analog-to-digital converters, Architectural compensation techniques for analog inaccuracies in ΔΣanalog-to-digital converters

    Creator:
    Maghari, Nima
    Abstract:
    Delta-sigma analog-to-digital converters (ADCs) are suitable for many applications due to several advantages such as relaxed anti-aliasing filter, high signal-to noise and distortion ratio (SNDR) and most important of all, reduced sensitivity to analog imperfections.This thesis introduces several structures to overcome loop imperfections and stability issues in delta-sigma modulators. First,...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 A general N th order single-loop modulator. . . . . . . . . . . . . . . . . . . . . . . 10

  • Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters

    Creator:
    Zanbaghi, Ramin
    Abstract:
    There is a significant need in recent mobile communication and wireless broadband systems for high-performance analog-to-digital converters (ADCs) that have wide bandwidth (BW>5-MHz) and high data rate (>100-Mbps). A delta-sigma ADC is recognized as a power-efficient ADC architecture when high resolution (>12-b) is required. This is due to several advantages...
    Resource Type:
    Dissertation
    Full Text:
    fabricated prototype IC achieves a dynamic range of 80 dB with 10 MHz signal bandwidth and analog

  • Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

    Creator:
    Guerber, Jon
    Abstract:
    In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
    Resource Type:
    Dissertation
    Full Text:
    ............................................................................ 10 2.2.1 The Successive Approximation Algorithm

  • Novel structures for high-speed delta-sigma data converters

    Creator:
    Chae, Jeong Seok
    Abstract:
    As CMOS processes keep scaling down devices, the maximum operating frequencies of CMOS devices increase, and hence circuits can process very wide band signals. Moreover, the small physical dimensions of transistors allow the placing of many more blocks into a single chip, including highly accurate analog blocks and complicated digital...
    Resource Type:
    Dissertation
    Full Text:
    .........................................................10 2.7 First-stage integrator with a second-stage sampling network

  • Noise coupling techniques in multi-cell delta-sigma modulators

    Creator:
    Bonu, Madhulatha
    Abstract:
    High performance multi-cell delta-sigma modulators are a preferred choice in applications which require programmability. Multi-cell delta-sigma modulators with M unit cells provide 10log10(M) SQNR improvement for the same thermal noise and bias power due to the uncorrelated quantization noises of the M unit ADCs. This concept is used in this...
    Resource Type:
    Masters Thesis
    Full Text:
    10 -3 10 -2 10 -1 -250 -200 -150 -100 -50 0 Frequency, f / fs P ow er s pe ct ra l d

  • Substrate noise coupling in ring oscillator-based phase locked loops

    Creator:
    Shreeve, Robert
    Abstract:
    In this thesis, the performance degradation of a phase-locked loop due to substrate noise is examined. A new analytical equivalent circuit model for substrate noise coupling is derived for a heavily doped silicon substrate. The model has been validated with measured data from a 0.35 μm CMOS process. Since the...
    Resource Type:
    Masters Thesis
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Coupling Between Different Islands . . . . . . . . . . . . . . . . . . 12 2.4 Conclusion

  • Power efficient analog-to-digital converters using both voltage and time domain information

    Creator:
    Oh, Taehwan
    Abstract:
    As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs is strongly increased. Recently, time-domain quantization has drawn attention from its scalability in deep submicron CMOS processes. Furthermore, there are several interesting aspects of time-domain...
    Resource Type:
    Dissertation
    Full Text:
    ....................................................................................... 9 2.1.3 Multi-step TDC based on time amplifier ................................................ 10

  • Techniques for improving timing accuracy of multi-gigahertz track/hold circuits

    Creator:
    Wang, Jingguang
    Abstract:
    Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8 bits resolution are used in many signal communication applications. Unfortunately, the performance of the high speed ADC is limited by the timing accuracy of the sampling clock. A small sampling uncertainty can cause a large error in the sampled voltage and result...
    Resource Type:
    Masters Thesis
    Full Text:
    39  Figure 4-9 Phase interpolator range, 128 steps 40  Figure 4-10 Non-overlap clock buffers 40