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Filtering by: Alternative title ssim FG 7 Remove constraint Alternative title ssim: FG 7 Committee Member Hanumolu, Pavan Kumar Remove constraint Committee Member: Hanumolu, Pavan Kumar Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering Resource Type Dissertation Remove constraint Resource Type: Dissertation

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  • Digital phase-locked loops for multi-GHz clock generation

    Creator:
    Kratyuk, Volodymyr
    Abstract:
    A digital implementation of a PLL has several advantages compared to its analog counterpart. These include easy scalability with process shrink, elimination of the noise susceptible analog control for a voltage controlled oscillator (VCO) and the inherent noise immunity of digital circuits. Several recent digital PLL (DPLL) implementations have achieved...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 A DESIGN PROCEDURE FOR DIGITAL PHASE-LOCKED LOOPS 7 2.1 Introduction

  • Low power receivers for wireless sensor networks

    Creator:
    Ni, Ronghua
    Abstract:
    Wireless sensor networks are becoming important in several monitoring and sensing applications. Ultra low power consumption in the sensor nodes is important for extending the battery life of the nodes. In this dissertation, two low power BFSK receiver architectures are proposed and verified with prototype implementations in silicion. A 2.4...
    Resource Type:
    Dissertation
    Full Text:
    shown in Fig. 1.3, the wireless transceiver is the most power hungry block [7]. Therefore, it is