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  • Interlaced instruction window

    Creator:
    Ong, Wee-Shong
    Abstract:
    A relatively recent development in the late 1980s in processors has been the superscalar processor. Superscalar processors use multiple pipelines in an attempt to achieve higher performance than previous generations of processors. Having multiple pipelines makes it possible to execute more than one instruction per cycle. However, since instructions are...
    Resource Type:
    Masters Thesis
    Full Text:
    on May 27 1997. Title: Interleaved Instruction Window. Abstract approve Shih-Lien Lu A

  • Low-power dynamic CMOS circuits in high-performance memory arrays

    Creator:
    Patwary, Md. Ataur R.
    Abstract:
    Dynamic CMOS circuits are commonly used in high-performance memory arrays to implement wide-NOR logic functions for their read and search operations. This is because dynamic circuits have significantly higher speed and lower area compared to static circuits for performing similar operations. Register File (RF) arrays are located at the top...
    Resource Type:
    Dissertation
    Full Text:
    : ______________________________________________________ Shih-Lien L. Lu Dynamic CMOS circuits are commonly used in high-performance memory

  • Advanced microarchitecture and circuit design techniques for on-chip memories in CMOS technology

    Creator:
    Hsu, Steven K.
    Abstract:
    In modern on-chip memories, an increasing demand for higher performance, lower power, reduced area, and improved robustness creates a rising need for advanced microarchitecture and circuit design techniques. Particularly in large-signal multi-ported register files, these advanced design techniques include: (i) multi-banked arrays, (ii) multi-frequency arrays, (iii) multi-bit width gating, (iv)...
    Resource Type:
    Dissertation
    Full Text:
    Shih-Lien Lu In modern on-chip memories, an increasing demand for higher performance, lower