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Committee Member
Liu, Huaping
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Date
2006
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Single-level dynamic register caching architecture for high-performance superscalar pr...
Scaled modeling and simulation of ocean wave linear generator buoy systems
Multi-dimensional parametric estimation: two-dimensional sharpening by predictive band...
Low-power design techniques for low-voltage analog-to-digital converters
Low noise clocking for high speed serial links
Comparison and impact of substrate noise due to clocked and clockless circuitry
Advanced propulsion systems for linear motion with high performance requirements
A dual-path 2-0 MASH ADC with dual digital error correction
A channelized digital receiver design for UWB sytems in a multipath indoor environment
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Academic Affiliation
Electrical Engineering and Computer Science
9
Advisor
Moon, Un Ku
2
von Jouanne, Annette
2
Fiez, Terri S.
1
Hanumolu, Pavan Kumar
1
Lee, Ben
1
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2007
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Committee Member
Liu, Huaping
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9
Moon, Un-Ku
2
Nguyen, Thinh
2
Temes, Gabor
2
Coakley, Jim Jr.
1
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Creator
Brownlee, Merrick
1
Chang, Yuhao
1
Gore, Ganesh P.
1
Kim, Min Gyu
1
Le, Jim K.
1
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Date
2006
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9
Decade
2000-2009
9
Degree Field
Electrical and Computer Engineering
9
Degree Level
Doctoral
5
Master's
4
Degree Name
Doctor of Philosophy (Ph.D.)
5
Master of Science (M.S.)
4
File Format
application/pdf
9
Language
English [eng]
9
License
All rights reserved
7
Non-Academic Affiliation
Oregon State University. Graduate School
9
Peer Reviewed
No
6
Resource Type
Dissertation
5
Masters Thesis
4
Rights Statement
In Copyright
9
Subject
Actuators
1
Analog-to-digital converters -- Design and construction
1
Asynchronous circuits -- Noise
1
Buoys -- Mathematical models
1
Cache memory
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