Index Catalog // ScholarsArchive@OSU

Creator:: Wang, Xuesheng
Abstract:: This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
Resource Type:: Dissertation
Full Text:: briefly mentioned. yin Analog !: Digital v(k) Is i-s Figure 2-1 Analog-to-digital conversion. N bits

Creator:: Sharma, Vivek
Abstract:: This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
Resource Type:: Masters Thesis
Full Text:: Vin(k) Vin,i (k) Vres,i (k) ADCi DACi Bout,i (k) VDAC,i (k) GS/H,i 13 A/D conversions

Creator:: Brown, Thomas (Thomas William)
Abstract:: Two aspects of ADC system performance are addressed in this work. First, the combination of the ADC and its associated reference are co-designed for an energy constrained remote sensing system. Second, sampling linearity is mathematically analyzed as a function of frequency to provide enhanced understanding into an ADC's requisite sampling...
Resource Type:: Dissertation
Full Text:: χ(kl) . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 3.6 Expansion of d(kl(αi

Creator:: Musah, Tawfiq
Abstract:: Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially...
Resource Type:: Dissertation
Full Text:: . For the ADC of DAC ADC A D C V IN G A D 1 D 2 E 1 MDAC D OUT E 2 G -1 Figure

Creator:: Guerber, Jon
Abstract:: In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
Resource Type:: Dissertation
Full Text:: ......... 84 Figure 4.2: Example low-resolution sub-ADC threshold levels (a) 3b, (b) 2.5b, (c) CRZZ=2, (d

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