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Filtering by: Creator Al-Alusi, Thamir R. Remove constraint Creator: Al-Alusi, Thamir R. Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping File Format application/pdf Remove constraint File Format: application/pdf

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  • A comparative study of lowpass continuous-time delta-sigma modulators with pulse-shaped DACs

    Creator:
    Fang, Jie
    Abstract:
    Recently, continuous-time ΔΣ modulators are appearing increasingly often in both the literature and the marketplace due to their features of inherent antialiasing and relaxed requirements for opamp and so on. However, several nonideal factors such as clock jitter, excess loop delay, inter-symbol interference and so on, degrade the SNR performance...
    Resource Type:
    Masters Thesis
    Full Text:
    feedback DAC from an optimal discrete-time noise transfer function, which can be obtained from R

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    usea ‘ready’ (R) bits in the Rename Stage (R-array) and Issue Window to indicate when valid data are

  • A survey on continuous-time modulators : theory, designs and implementations

    Creator:
    Gao, Xiaoran
    Abstract:
    Recently, delta-sigma modulation has become a widely applied technique for high-performance analog-to-digital conversion of narrow-band signals. Most of the early designs used discrete-time structure for good accuracy and good linearity. The transfer functions are independent of the clock frequency. However, high unity-gain bandwidths of the opamps are required to satisfy...
    Resource Type:
    Masters Thesis
    Full Text:
    transfer functions are independent of the clock frequency [R. Schreier2005}. However, in switched

  • Low-complexity high-speed VLSI design of low-density parity-check decoders

    Creator:
    Cui, Zhiqiang
    Abstract:
    Low-Density Parity-check (LDPC) codes have attracted considerable attention due to their capacity approaching performance over AWGN channel and highly parallelizable decoding schemes. They have been considered in a variety of industry standards for the next generation communication systems. In general, LDPC codes achieve outstanding performance with large codeword lengths (e.g.,...
    Resource Type:
    Dissertation
    Full Text:
    ⎟⎟ ⎟ ⎟ ⎟ ⎟ ⎠ ⎞ ⎜⎜ ⎜ ⎜ ⎜ ⎜ ⎝ ⎛ + − − + − + × ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ α= ∏ ∏ ∏ ∈ β β ∈ β β ∈ vmNn mn mn vmNn mn mn vmNn mnmv 1e 1e1 1e 1e1 R

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    shows a clock boosting circuit proposed by Nakagome et al [5]. It provides approximately 2VDD output

  • Low-voltage data converters

    Creator:
    Meng, Qingdong
    Abstract:
    With the growing demand for portable/consumer electronics, such as digital audio/video (AV), the downscaling of device dimensions, which enables the integration of an increasing number of transistors in a single chip, is mandatory. This trend also continuously pushes the power supply voltage down to reduce the power consumption and improve...
    Resource Type:
    Dissertation

  • Advanced propulsion systems for linear motion with high performance requirements

    Creator:
    Zhou, Xiaolin
    Abstract:
    Traditionally linear actuator applications are addressed by the use of hydraulic systems. The high maintenance cost and poor reliability will always be the most critical problem in the real applications. Benefited from both the high mechanical advantage of the roll screw and the simple structure of the switched reluctance motor,...
    Resource Type:
    Dissertation
    Full Text:
    += (Equation 2.1) phV is the phase voltage, i is the instantaneous phase current, R is the stator

  • Growth and characterization of zinc ferrite thin films for high frequency applications

    Creator:
    Hu, Jiqing
    Abstract:
    Ferrites have been used for various high frequency applications as bulk materials. These applications, however, are limited to large dimension devices. In this thesis, thin film ferrites were deposited from a low temperature solution-based deposition process that is suitable for micro-scale high frequency applications. The low temperature nature of this...
    Resource Type:
    Dissertation
    Full Text:
    . Jansen, B. Hoekstra, and P.F. Bongers, J. Cryst. Growth, 41, (1977) 29. [4] M.F. Gillies, R. Coehoorn

  • Modified VLSI designs for error correction codes

    Creator:
    Chen, Lupin
    Abstract:
    Nowadays, error correction codes have become an integral part in almost all the modern digital communication and storage systems. With the continuously increasing demands for higher speed and lower power communication systems, efficient VLSI implementations of those error correction codes have great importance for practical applications. In this thesis, several...
    Resource Type:
    Masters Thesis
    Full Text:
    convolutional decoder takes the received vector r and tries to extract the transmitted information sequence

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    Fig.3-4. SNR improvement after DAC correction 33 0 5 10 10 -5 10 -4 10 -3 er ro r re