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Filtering by: Creator Faustini, John M. Remove constraint Creator: Faustini, John M. Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping File Format application/pdf Remove constraint File Format: application/pdf

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  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF John A. Liebert for the degree of Master of Science in Electrical

  • Growth and characterization of zinc ferrite thin films for high frequency applications

    Creator:
    Hu, Jiqing
    Abstract:
    Ferrites have been used for various high frequency applications as bulk materials. These applications, however, are limited to large dimension devices. In this thesis, thin film ferrites were deposited from a low temperature solution-based deposition process that is suitable for micro-scale high frequency applications. The low temperature nature of this...
    Resource Type:
    Dissertation
    Full Text:
    2. 1. The ferrite plating kinetic mechanism proposed by M. Abe ………. 5 2. 2. The Schematic of

  • A channelized digital receiver design for UWB sytems in a multipath indoor environment

    Creator:
    Chang, Yuhao
    Abstract:
    This thesis presents a channelized digital receiver design for UWB sytems in a multipath indoor environment. The UWB technology has been used for commercial and military purposes due to a number of advantages such as low-power consumption, noise-like and carrier free. The energy of UWB signal is spread over a...
    Resource Type:
    Masters Thesis
    Full Text:
    ….………………………………………………………17 12. Convolutional Encoder with g(x)=(23,35), Rate 1/2 and M=4

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    one. Fig.2-3 shows the digital DAC correction technique [2-4] applied to a feed-forward DSM. Here M

  • Efficient VLSI architectures for MIMO and cryptography systems

    Creator:
    Li, Qingwei
    Abstract:
    Multiple-input multiple-output (MIMO) communication systems have recently been considered as one of the most significant technology breakthroughs for modern wireless communications, due to the higher spectral efficiency and improved link reliability. The sphere decoding algorithm (SDA) has been widely used for maximum likelihood (ML) detection in MIMO systems. It is...
    Resource Type:
    Dissertation
    Full Text:
    ..........................................................9 2.1. Performance comparisons of ML, 6-Best, 8-Best and 6-Best reordered SD (N=M=4, 64QAM

  • A survey on continuous-time modulators : theory, designs and implementations

    Creator:
    Gao, Xiaoran
    Abstract:
    Recently, delta-sigma modulation has become a widely applied technique for high-performance analog-to-digital conversion of narrow-band signals. Most of the early designs used discrete-time structure for good accuracy and good linearity. The transfer functions are independent of the clock frequency. However, high unity-gain bandwidths of the opamps are required to satisfy...
    Resource Type:
    Masters Thesis
    Full Text:
    same cancellation logic or filter for the discrete time modulators [M. Ortmanns200l][H. Shamsi2006

  • Low noise clocking for high speed serial links

    Creator:
    Brownlee, Merrick
    Abstract:
    As the functionality of digital chips continues to increase dramatically, chip- to-chip communication bandwidths must scale accordingly to avoid constraining the overall system performance. Therefore, high speed transceiver design has be- come an important research topic. In particular, the performance of the circuits that are responsible for timing accuracy are...
    Resource Type:
    Dissertation
    Full Text:
    response. 58 5.24 .1, m, W3dB, and wa as a function of x. 59 6.1 Proposed bang-bang CDR. (a) Phase

  • Modified VLSI designs for error correction codes

    Creator:
    Chen, Lupin
    Abstract:
    Nowadays, error correction codes have become an integral part in almost all the modern digital communication and storage systems. With the continuously increasing demands for higher speed and lower power communication systems, efficient VLSI implementations of those error correction codes have great importance for practical applications. In this thesis, several...
    Resource Type:
    Masters Thesis
    Full Text:
    . Closely related to K is the parameter m, which indicated how many encoder cycles an input bit is

  • A comparative study of lowpass continuous-time delta-sigma modulators with pulse-shaped DACs

    Creator:
    Fang, Jie
    Abstract:
    Recently, continuous-time ΔΣ modulators are appearing increasingly often in both the literature and the marketplace due to their features of inherent antialiasing and relaxed requirements for opamp and so on. However, several nonideal factors such as clock jitter, excess loop delay, inter-symbol interference and so on, degrade the SNR performance...
    Resource Type:
    Masters Thesis
    Full Text:
    noise and S/H noise from f=0 to ∞ gives C mkT and C kTm)1( − , respectively; here m is the duty

  • Noise optimization for low-voltage CMOS audio preamplifier systems

    Creator:
    Brown, Matthew Eugene
    Abstract:
    There is a large and growing market for portable consumer audio products with very small size. As the size of these products is reduced, the area occupied by batteries becomes significant and hence limits the number of batteries to one. In order to build such small products, high levels of...
    Resource Type:
    Masters Thesis
    Full Text:
    er ( dB ), N or m al iz ed to A F = 1, 2 0 to 2 0k H z FIGURE 4.1. Flicker Noise