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Filtering by: Creator Miller, P. A. Remove constraint Creator: Miller, P. A. Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping Resource Type Dissertation Remove constraint Resource Type: Dissertation

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  • Energy efficient communication across on-chip wires in digital CMOS

    Creator:
    Postman, Jacob
    Abstract:
    For the past half century, CMOS process scaling has followed Moore's law, approximately doubling transistor density every 18 months. While locally routed wires have generally scaled with transistor size, longer wires have scaled at a slower rate and in some cases have grown larger as chip size and complexity have...
    Resource Type:
    Dissertation
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    , longer wires have scaled at a slower rate and in some cases have grown larger as chip size and

  • The Architecture of a Reusable Built-In Self-Test for Link Training, IO and Memory Defect Detection and Auto Repair on 14nm Intel SOC

    Creator:
    Querbach, Bruce
    Abstract:
    The complexity of designing and testing today's system on chip (SOC) is increasing due to greater integrated circuit (IC) density and higher IO and memory frequencies. SOCs for the mobile phone and tablet market have the unique challenge of short product development windows, at times less than six months, and...
    Resource Type:
    Dissertation
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    : Adjacent neighborhood of a memory cell B (source P. de Jong and A. J. van de Goor [12]) Different

  • Information theoretic approach to quantization and classification for signal processing, communications, and machine learning applications

    Creator:
    Thuan Nguyen D.
    Abstract:
    There are five main contributions of this dissertation. The first contribution is new closed-form expressions for channel capacity of a new class of channel matrices. The second contribution is the discovery of the structure for optimal binary quantizer and the associated methods for finding an optimal quantizer that maximizes mutual...
    Resource Type:
    Dissertation
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    that when the ratio of the channel conditional density r(y) = P (Y=y|X=0)P (Y=y|X=1) is a strictly

  • Immune radio architecture for platform interference

    Creator:
    Alban, Eduardo
    Abstract:
    The decrease of switching times accompanied by the corresponding increase of clock speeds and data rates, contributes to improve the overall system computational performance. At the same time, they also affect wireless communications due to an increment in the emissions of electromagnetic radiation on the radio bands. In this dissertation...
    Resource Type:
    Dissertation
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    ) ) . (2.8) Figure 2.5 shows the power spectrum of a random signal with uneven transition times for p = 1/2

  • Variable sampling compensation of networked control systems with delays using neural networks

    Creator:
    Lopez-Echevarria, Daniel
    Abstract:
    In networked control systems (NCS) information or packets usually flow from a sensor or a set of sensors to a remotely located controller. Then the controller processes the received information and sends a series of control commands to the actuators through a communication network which could be either wireless or...
    Resource Type:
    Dissertation
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    represented in Fig. 2.5. The value of the signal ak is predicted on the basis of a linear combination of p

  • Modeling and analysis of spur structure of digital-to-time conversion based frequency synthesizers

    Creator:
    Talwalkar, Sumit A.
    Abstract:
    Frequency synthesizers are critical components of all communication systems. This thesis considers the issue of undesirable frequency spurs of a relatively recent type of frequency synthesis architecture called digital-to-time conversion (DTC). The DTC-based frequency synthesis architecture has important performance benefits over older frequency synthesizers, such as fast frequency switching, large...
    Resource Type:
    Dissertation
    Full Text:
    ______________________________________________________ AN ABSTRACT OF THE THESIS OF Sumit A. Talwalkar for the degree of Doctor of

  • Some contributions to asymmetric error control codes

    Creator:
    Elmougy, Samir
    Abstract:
    In some practical systems, most of the errors are of 1 → 0 type and 0 → 1 errors occur very rarely. In this thesis, first, the capacity of the asymmetric channel is derived. The capacity of the binary symmetric channel (BSC) and the Z-channel can be derived from this...
    Resource Type:
    Dissertation
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    a channel with input alphabet S and output alphabet Sy, let p(yjIXj) be the probability that the

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
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    Dissertation
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    10 -1 10 0 10 1 10 2 20 30 40 50 60 70 80 90 Frequency (Hz) P h a s e ( d e g re e

  • Real-time radioxenon measurement using a Compton-suppressed well-type phoswich detector for nuclear explosion monitoring

    Creator:
    Alemayehu, Bemnet
    Abstract:
    Radioxenon detection is a technique used to monitor nuclear explosion and verify the Comprehensive Nuclear-Test-Ban Treaty (CTBT). Because of an ultra-low concentration of radioxenon at radioxenon monitoring stations, radioxenon detection systems must have high sensitivity. This sensitivity is measured in terms of detector's minimum detectable concentration (MDC). It is required...
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    Dissertation
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    and Miller (1999) and Childress and Miller (2002) developed a triple layer phoswich detector for the

  • A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

    Creator:
    Wang, Xuesheng
    Abstract:
    This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
    Resource Type:
    Dissertation
    Full Text:
    : A Fully Digital Technique for the Estimation and Correction of the DAC Abstract Error in Multi-bit