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Filtering by: DOI 10.5849/wjaf.11-027 Remove constraint DOI: 10.5849/wjaf.11-027 Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • Low noise clocking for high speed serial links

    Creator:
    Brownlee, Merrick
    Abstract:
    As the functionality of digital chips continues to increase dramatically, chip- to-chip communication bandwidths must scale accordingly to avoid constraining the overall system performance. Therefore, high speed transceiver design has be- come an important research topic. In particular, the performance of the circuits that are responsible for timing accuracy are...
    Resource Type:
    Dissertation
    Full Text:
    on eye opening 11 2.7 Eye diagram before and after receive jitter 12 2.8 (a) The effect of

  • Opportunistic bandwidth sharing through reinforcement learning

    Creator:
    Venkatraman, Pavithra
    Abstract:
    The enormous success of wireless technology has recently led to an explosive demand for, and hence a shortage of, bandwidth resources. This expected shortage problem is reported to be primarily due to the inefficient, static nature of current spectrum allocation methods. As an initial step towards solving this shortage problem,...
    Resource Type:
    Masters Thesis
    Full Text:
    [11, 12], and from market-oriented access strategies [13, 14] to new management and architecture

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    improvement after turning on digital correction…………..60 5-11 SNR and SNDR versus input amplitude with

  • An ultra low voltage micropower GPS receiver RF front-end for wildlife tracking

    Creator:
    Heiberg, Adam C.
    Abstract:
    A fully integrated CMOS GPS receiver RF front end optimized for low power operation is presented. The system operates with a supply voltage down to 250 mV. A prototype has been fabricated in a 0.13μm CMOS process and includes a low voltage LNA, quadrature oscillators, and quadrature mixers. It exhibits...
    Resource Type:
    Masters Thesis
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 LNA circuit schematic

  • A 5 GHz Wi-Fi Receiver Front End with 4x80 MHz Channels for a High Accuracy Indoor Localization System

    Creator:
    Gray, Kyle L.
    Abstract:
    The ability to accurately locate people and objects indoors will enable opportunities for control and automation of indoor environments. Current indoor localization solutions require dedicated hardware which must be custom tailored to each application. There are large technological, societal, and economic benefits in developing a more general purpose system that...
    Resource Type:
    Masters Thesis
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 Functional Requirements

  • High-Resolution mm-wave Digitally Controlled Oscillator in CMOS

    Creator:
    Wang, Yunqi
    Abstract:
    All-digital PLLs promise flexible and precise frequency modulation continous-wave(FMCW) radar signal signal for 77GHz radar applications. Such PLLs require digitally-controlled oscillators(DCO) with wide frequency tuning range and high resolution to address a range of applications and low phase noise requirements. In this thesis, novel resonator structures with ne capacitance/inductance switching...
    Resource Type:
    Masters Thesis
    Full Text:
    oscillator [15] . . . . . . . 11 2.6 Parasitic capacitors of the transistor

  • Architecture design of multiplexed incremental analog-to-digital converters

    Creator:
    Zhang, Zhiqing
    Abstract:
    Analog-to-Digital Data Converters (ADCs) used in instrumentation and measurements often require high absolute accuracy, including excellent linearity and negligible dc offset. Incremental data converters (IDCs) provide a solution for such measurement applications. Since IDCs are essentially delta-sigma converters with reset operation before each conversion, they retain most of the advantages...
    Resource Type:
    Masters Thesis
    Full Text:
    .....................................................................11 3 Multiplexed IDCs

  • Eager data transfer mechanism for user-level network protocol

    Creator:
    Won, Chulho
    Abstract:
    This dissertation investigates the use of a hardware mechanism called Eager Data Transfer (EDT) for achieving the reduction of communication latency for user-level network protocol. To reach the goal, the dissertation addresses the following research issues. First, the development of a communication system performance evaluation tool called Linux/SimOS is presented....
    Resource Type:
    Dissertation
    Full Text:
    of Doctor of Philosophy in Electrical and Computer Engineering presented on June 11 2004. Title

  • Surface-Normal Modulation of Fano Resonances in Metallic Photonic Crystals for Free-Space Optical Interconnects

    Creator:
    Ren, Fanghui
    Abstract:
    This dissertation focuses on the development of ultra-compact optical devices for free-space modulation. We propose a surface-normal modulator using metallic photonic crystals for free-space optical interconnects. The active control of light intensity is achieved by engineering the Fano resonances in metallic photonic crystals. Both thermo-optic modulation and electro-optic modulation of...
    Resource Type:
    Dissertation
    Full Text:
    Modulators Based on Surface-Normal Modulation ......... 11 1.3. Plasmonic Modulation for Ultra-Compact

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
    Resource Type:
    Dissertation
    Full Text:
    ]. . . . . . . . . . . . . . . . . 11 1.7 IIP3 and OIP3 [1]. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.8 Anti-aliasing