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  • Energy efficient communication across on-chip wires in digital CMOS

    Creator:
    Postman, Jacob
    Abstract:
    For the past half century, CMOS process scaling has followed Moore's law, approximately doubling transistor density every 18 months. While locally routed wires have generally scaled with transistor size, longer wires have scaled at a slower rate and in some cases have grown larger as chip size and complexity have...
    Resource Type:
    Dissertation
    Full Text:
    PipelineTFC Traversal (d) Figure 2.2: SWIFT NoC Architecture: (a) Routing using tokens (b) To- ken

  • The Architecture of a Reusable Built-In Self-Test for Link Training, IO and Memory Defect Detection and Auto Repair on 14nm Intel SOC

    Creator:
    Querbach, Bruce
    Abstract:
    The complexity of designing and testing today's system on chip (SOC) is increasing due to greater integrated circuit (IC) density and higher IO and memory frequencies. SOCs for the mobile phone and tablet market have the unique challenge of short product development windows, at times less than six months, and...
    Resource Type:
    Dissertation
    Full Text:
    certain address accesses multiple cells simultaneously c. No address can access a certain cell d

  • Information theoretic approach to quantization and classification for signal processing, communications, and machine learning applications

    Creator:
    Thuan Nguyen D.
    Abstract:
    There are five main contributions of this dissertation. The first contribution is new closed-form expressions for channel capacity of a new class of channel matrices. The second contribution is the discovery of the structure for optimal binary quantizer and the associated methods for finding an optimal quantizer that maximizes mutual...
    Resource Type:
    Dissertation
    Full Text:
    impurity using (a) N = 10; (b) N = 20; (c) N = 30; (d) N = 40. Our approximation (R(emax)) are the red

  • A novel linear generator for wave energy applications

    Creator:
    Ernst, Steven George
    Abstract:
    With the increasing effort to identify alternative methods of energy generation, extraction of ocean energy has gathered a large interest. Research and industry have begun considering wave energy as the next new alternative energy. The unique challenges of ocean energy requires a wave energy converter to be both robust and...
    Resource Type:
    Masters Thesis
    Full Text:
    , 2009. Title: A Novel Linear Generator for Wave Energy Applications Abstract approved: Ted K. Brekken

  • Methods for evaluating the impact of renewable resource variability on grid operation and planning

    Creator:
    Halamay, Douglas A.
    Abstract:
    With the recent interest in increasing the penetration of renewable energy sources onto the power grid, there has been an unprecedented rapid deployment of wind generation, especially in the US Pacific Northwest. While wind farm developers have continued to expand their operations, power system operators are left to deal with...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF Douglas A. Halamay for the degree of Master of Science in Electrical

  • Adaptive, wideband analog-to-digital conversion for convergent communication systems

    Creator:
    Batten, Robert D., 1973-
    Abstract:
    The exponential rate of advances in modern communication devices in the last several years have brought us higher levels of functionality and performance as well as reductions in physical size and power consumption. To continue this rate of advancement, next generation systems require wider bandwidth and higher resolution ADCs. Additionally,...
    Resource Type:
    Dissertation
    Full Text:
    n M o v i n g O b j e c t De tec t i on I Q X X A D C A D C D S P U s e r I n t e r

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    thesis describes the problems of extending bandwidth without losing accu- racy in z A/D converters, and

  • Modeling and analysis of spur structure of digital-to-time conversion based frequency synthesizers

    Creator:
    Talwalkar, Sumit A.
    Abstract:
    Frequency synthesizers are critical components of all communication systems. This thesis considers the issue of undesirable frequency spurs of a relatively recent type of frequency synthesis architecture called digital-to-time conversion (DTC). The DTC-based frequency synthesis architecture has important performance benefits over older frequency synthesizers, such as fast frequency switching, large...
    Resource Type:
    Dissertation
    Full Text:
    example. Figure 1.3 shows a series of four delays, each with a delay d. They are fed with a reference

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    ) without ports b 32 Data width of the architecture d --- Length of a wire (distance) p --- Total

  • Side channel attack resistant elliptic curves cryptosystem on multi-cores for power efficiency

    Creator:
    Yoo, Jaewon
    Abstract:
    The Advent of multi-cores allows programs to be executed much faster than before. Cryptoalgorithms use long-bit words thus parallelizing these operations on multi-cores will achieve significant performance improvement. However, not all long-bit word operations in cryptosystems are suitable for parallel execution on multi-cores. In particular, long-bit words used in Elliptic...
    Resource Type:
    Masters Thesis
    Full Text:
    P’3 P3 Addition P3 = P1 + P2 Doubling P3 = P1 + P1 GF(p)d, e a,b,c = 0;p>3;4d 3 +27e 2