High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most...
Ultra-high-speed (>10GS/s), medium-resolution (5~6bit), low-power (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and next-generation serial link receivers. There are several challenges to enable a successful design, however. First, the time-interleaved architecture is required in order to achieve over 10GS/s sampling rate, with the trade-off...
Frequency synthesizers are critical components of all communication systems. This thesis considers the issue of undesirable frequency spurs of a relatively recent type of frequency synthesis architecture called digital-to-time conversion (DTC). The DTC-based frequency synthesis architecture has important performance benefits over older frequency synthesizers, such as fast frequency switching, large...
Achieving sharpened (enhanced detail) features of a multi-dimensional data source using the linear prediction (LP) bandwidth extrapolation (BWE) technique in the transform domain is the main objective of this research. The evolution of sensor technology has provided acquisition scenarios in which the data format is inherently multi-dimensional, including hyperspectral imaging...
Spectrum overcrowding, ever increasing demand for high data rate and increased mobility requirements are three major challenges 5G-technology is trying to address. In this thesis I start with a RF front-end technique that deals with blocker interference arising from spectrum overcrowding both across frequency bands and within the same frequency...
The problem of locating a signal source, or an emitter, has many civilian and military applications, such as communication regulations enforcement, military reconnaissance, and search-and-rescue operations. Many of the most widely used emitter location methods rely on the accurate and robust estimation of the differential time delay,
or time-difference-of-arrival (TDOA),...
In wireless sensor network applications, low-power operation of the wireless receiver is critical. To address this need an ultra-low power Binary Frequency Shift Keying (BFSK) receiver using the super-regenerative architecture is developed.
A prototype receiver is built and tested for operation in the 900 MHz ISM band. Lab measurements show...
An ultra low power crystal oscillator that provides a frequency reference for battery
powered timekeeping applications is presented. An amplitude control circuit is employed to ensure that minimum current is consumed. A subthreshold voltage regulator provides a supply voltage for the oscillator with minimum current consumption. The oscillator and regulator...
An enhanced swing differential Colpitts VCO (ESDC-VCO) dramatically improves
the swing of a Colpitts VCO by allowing the signal to swing below ground and above the
supply voltage. Fabricated in a 1P8M 0.13 um CMOS process, the ESDC-VCO operates
at 4.9GHz with a 0.475-V supply and consumes 2.7mW. The measured...
The design of mobile wireless devices has always focused on reducing power, area, and cost. This dissertation proposes two techniques that are leveraged to save power and area and therefore cost. The first techniques reduces the noise in the receiver and results in a relaxed power requirement. The second technique...