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Filtering by: Alternative title ssim Report no. 73-5 Remove constraint Alternative title ssim: Report no. 73-5 Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • A 5 GHz Wi-Fi Receiver Front End with 4x80 MHz Channels for a High Accuracy Indoor Localization System

    Creator:
    Gray, Kyle L.
    Abstract:
    The ability to accurately locate people and objects indoors will enable opportunities for control and automation of indoor environments. Current indoor localization solutions require dedicated hardware which must be custom tailored to each application. There are large technological, societal, and economic benefits in developing a more general purpose system that...
    Resource Type:
    Masters Thesis
    Full Text:
    A 5 GHz Wi-Fi Receiver Front End with 4x80 MHz Channels for a

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    provides mismatch error shaping. In the simulated Power Spectra Density (PSD), no in-band pattern tones

  • Prototyping a triple-layer phoswich detection system

    Creator:
    Duncan, Christopher L.
    Abstract:
    Multi-layer optically coupled scintillation based radiation detectors, known as phoswich detectors, have rapidly evolved in recent years. During the same time, digital signal processing has improved radiation discrimination accuracy and enhanced reliability, while reducing complexity and size of traditional analog signal processing methods. A new generation of high-speed radiation detectors...
    Resource Type:
    Masters Thesis
    Full Text:
    ) ................................................... 73 Figure 5-13: Measured efficiencies in BC400 + CaF2(Eu) layers for 14C (156 keV), 36Cl (709 keV

  • Side channel attack resistant elliptic curves cryptosystem on multi-cores for power efficiency

    Creator:
    Yoo, Jaewon
    Abstract:
    The Advent of multi-cores allows programs to be executed much faster than before. Cryptoalgorithms use long-bit words thus parallelizing these operations on multi-cores will achieve significant performance improvement. However, not all long-bit word operations in cryptosystems are suitable for parallel execution on multi-cores. In particular, long-bit words used in Elliptic...
    Resource Type:
    Masters Thesis
    Full Text:
    , which requires 132/32 =5 iterations with the last iteration requiring just a 3-bit operation. This

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    technique of dynamically steering instructions requires slightly more logic to implement, but incurs no

  • An ultra low voltage micropower GPS receiver RF front-end for wildlife tracking

    Creator:
    Heiberg, Adam C.
    Abstract:
    A fully integrated CMOS GPS receiver RF front end optimized for low power operation is presented. The system operates with a supply voltage down to 250 mV. A prototype has been fabricated in a 0.13μm CMOS process and includes a low voltage LNA, quadrature oscillators, and quadrature mixers. It exhibits...
    Resource Type:
    Masters Thesis
    Full Text:
    noise of -113.8 dBc/Hz at a 1 MHz offset while consuming a maximum of 580 µW of power and requiring no

  • Model development via delay extraction for the time-domain simulation of lossy transmission lines.

    Creator:
    Blevins, Chris
    Abstract:
    This thesis presents two new approaches for the broadband, time-domain modeling of lossy transmission lines. Each approach is based on an alternative derivation of delay extraction in order to separate the line's linear phase from its attenuation and dispersion. Augmentation networks represent the derived attenuation networks as rational function approximations....
    Resource Type:
    Masters Thesis
    Full Text:
    each port. This approach is applied to single and coupled lines at lengths ranging from 5 cm to 10 m

  • Measurement and characterization of ultra-wideband wireless interconnects within active computing systems

    Creator:
    Woracheewan, Sirikarn
    Abstract:
    Ultra-wideband (UWB) radio has become an attractive alternative for wireless communications due to the robustness to multipath fading, low power transmission, mostly-digital implementation, and low cost. Furthermore, short-range, high data-rates applications are possible with UWB radios due to the wide spectral allocations at 3.1 - 10.6 GHz. This thesis presents...
    Resource Type:
    Masters Thesis
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Introduction

  • Resource allocation methods for quality-of-service provisioning in heterogeneous wireless networks

    Creator:
    Chakchouk, Nessrine
    Abstract:
    The increased use of mobile wireless devices that we have recently been witnessing, such as smartphones, tablets, e-readers, and WiFi enabled devices in general, is driving an unprecedented increase in the amount of data traffic. This fast market adoption of the wireless technology along with the tremendous success of multimedia...
    Resource Type:
    Dissertation
    Full Text:
    capacity, connectivity, and Quality of Service (QoS) requirements that can no longer be met with

  • Design techniques for low-power multi-GS/s analog-to-digital converters

    Creator:
    Jiang, Tao
    Abstract:
    Ultra-high-speed (>10GS/s), medium-resolution (5~6bit), low-power (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and next-generation serial link receivers. There are several challenges to enable a successful design, however. First, the time-interleaved architecture is required in order to achieve over 10GS/s sampling rate, with the trade-off...
    Resource Type:
    Dissertation
    Full Text:
    . of bits 6 8 5 6 Speed [GS/s] 40 56 12 16 T/H No. 16 4 8 8 Sub-ADC TI of 10 SAR @250MS/s TI of