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Filtering by: Alternative title ssim Report no. 74-4 Remove constraint Alternative title ssim: Report no. 74-4 Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    provides mismatch error shaping. In the simulated Power Spectra Density (PSD), no in-band pattern tones

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    digital-to-analog converter (MDAC), (4) a new architecture for the low-power Nyquist rate pipelined ADC

  • Growth and characterization of zinc ferrite thin films for high frequency applications

    Creator:
    Hu, Jiqing
    Abstract:
    Ferrites have been used for various high frequency applications as bulk materials. These applications, however, are limited to large dimension devices. In this thesis, thin film ferrites were deposited from a low temperature solution-based deposition process that is suitable for micro-scale high frequency applications. The low temperature nature of this...
    Resource Type:
    Dissertation
    Full Text:
    ……………………………………… 4 CHAPTER 3. High-rate Deposition of Zinc Ferrite Thin Films from a Soft Solution Process

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    vary from 4 to 14. 16 was not used since then there would be no porting reduction, a major point of

  • An ultra low voltage micropower GPS receiver RF front-end for wildlife tracking

    Creator:
    Heiberg, Adam C.
    Abstract:
    A fully integrated CMOS GPS receiver RF front end optimized for low power operation is presented. The system operates with a supply voltage down to 250 mV. A prototype has been fabricated in a 0.13μm CMOS process and includes a low voltage LNA, quadrature oscillators, and quadrature mixers. It exhibits...
    Resource Type:
    Masters Thesis
    Full Text:
    noise of -113.8 dBc/Hz at a 1 MHz offset while consuming a maximum of 580 µW of power and requiring no

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
    Resource Type:
    Dissertation
    Full Text:
    shaping. Therefore, the thermal noise specifications of the comparator can be relaxed. Also, since no

  • Resource allocation methods for quality-of-service provisioning in heterogeneous wireless networks

    Creator:
    Chakchouk, Nessrine
    Abstract:
    The increased use of mobile wireless devices that we have recently been witnessing, such as smartphones, tablets, e-readers, and WiFi enabled devices in general, is driving an unprecedented increase in the amount of data traffic. This fast market adoption of the wireless technology along with the tremendous success of multimedia...
    Resource Type:
    Dissertation
    Full Text:
    capacity, connectivity, and Quality of Service (QoS) requirements that can no longer be met with

  • A Microwave Signal Correlator Based on Parametric Pumping of Spin Waves

    Creator:
    Hansen, Mikkel N.
    Abstract:
    This work demonstrates correlation of microwave signals encoded with 16-bit codes using the parametric interaction of spin waves. Signal processing correlators are devices that compare two signals, such as a reference code and a received code, where the output indicates the similarity between the signals. Correlators are used in communication...
    Resource Type:
    Masters Thesis
    Full Text:
    all combinations of 4-bit, 5-bit, 6-bit, and 7-bit codes. The maximum processing gain achieved by the

  • Some contributions to asymmetric error control codes

    Creator:
    Elmougy, Samir
    Abstract:
    In some practical systems, most of the errors are of 1 → 0 type and 0 → 1 errors occur very rarely. In this thesis, first, the capacity of the asymmetric channel is derived. The capacity of the binary symmetric channel (BSC) and the Z-channel can be derived from this...
    Resource Type:
    Dissertation
    Full Text:
    and All Asymmetric Error Detecting (t-ECAAED) codes. Redacted for privacy (4) ARQ Protocols with

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    modulator unstable. In this thesis, a multi-bit 3rd-order hybrid ∆ΣM with over full-scale range and no DEM