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Filtering by: Creator Ramos, V. A. Remove constraint Creator: Ramos, V. A. Committee Member Temes, Gabor Remove constraint Committee Member: Temes, Gabor Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter with 8X oversampling and 4 MHz Nyquist output rate

    Creator:
    Jiang, Ruoxin
    Abstract:
    In this dissertation, a new Δ∑ A/D converter is presented that is ideally suited for communication applications. It is based on a single-loop single-stage structure, which can realize a high maximum out-of-band quantization noise gain while maintaining stable operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order...
    Resource Type:
    Dissertation
    Full Text:
    Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter

  • Methods to improve the reliability and resiliency of near/sub-threshold digital circuits

    Creator:
    Crop, Joseph A.
    Abstract:
    Energy consumption is one of the primary bottlenecks to both large and small scale modern compute platforms. Reducing the operating voltage of digital circuits to voltages where the supply voltage is near or below the threshold of the transistors has recently gained attention as a method to reduce the energy...
    Resource Type:
    Dissertation
    Full Text:
    Near/Sub-Threshold Digital Circuits AN ABSTRACT OF THE DISSERTATION OF Joseph A. Crop for the

  • A switched-current bandpass delta-sigma modulator

    Creator:
    Dalal, Vineet R.
    Resource Type:
    Masters Thesis
    Full Text:
    channel charge is injected into the gate terminal of M1, thereby superimposing an error component A V on

  • Adaptive correction techniques for delta-sigma A/D converters

    Creator:
    Abdennadher, Salem
    Abstract:
    Oversampling analog-to-digital and digital-to-analog converters are gaining more popularity in many signal processing applications. Delta-sigma modulators are used in practical applications of oversampling systems because of their apparent practical advantage over other oversampling converters in terms of insensitivity to the inevitable imperfection of the analog circuitry. In Δ∑ modulators, analog...
    Resource Type:
    Masters Thesis
    Full Text:
    ., Noise-Shaped Coding, Ph.D. thesis, university of Toronto. Aug 1991. 39 [6] Oppenheim A. V

  • Interactive Internet connection for a remote digital signal processing lab

    Creator:
    Ehler, Michael
    Abstract:
    A remote Digital Signal Processing (DSP) lab for the Internet is developed to give students the opportunity to work together online with a remotely located Digital Signal Processor (DSP). Students in different locations can work together with the DSP as if they were present in the lab. To make this...
    Resource Type:
    Masters Thesis
    Full Text:
    Interactive Internet connection for a remote digital signal

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    -digital converters. To demonstrate the proposed design techniques, a 0.6 V, 82 dB, 2-2 cascaded au- dio

  • Design of a low jitter digital PLL with low input frequency

    Creator:
    Jung, Seokmin
    Abstract:
    Complex digital circuits such as microprocessors typically require support circuitry that has traditionally been realized using analog or mixed-signal macros. PLL circuits are used in many integrated applications such as frequency synthesizers and inter-chip communication interfaces. As process technologies advance and grow in complexity, the challenge of maintaining required analog...
    Resource Type:
    Masters Thesis
    Full Text:
    sK ∙ C V C 2.9 The integrator noise transfer function has a low-pass

  • A Wide Modulation Range and PVT-Tolerant Spread-Spectrum Modulation Clock Generator

    Creator:
    Sun, Hyuk
    Abstract:
    This dissertation presents a phase domain in-loop-bandwidth spread-spectrum clock generation technique. In this proposed technique, a charge-based discrete-time loop filter is proposed to enable the phase domain in-loop-bandwidth spread-spectrum modulation without a delta-sigma modulator or time-to-digital converter. The in-loop-bandwidth modulation technique maximizes the loop bandwidth to improve phase noise suppression...
    Resource Type:
    Dissertation
    Full Text:
    modulation. The output of the clock (VOUT(t)) is written as: OUT OUT n OUT SSC_ rate n V (t) A J ( ) cos

  • A DSP controlled resonant active filter for current harmonic mitigation in three-phase power systems

    Creator:
    Ünsal, Abdurrahman
    Abstract:
    Power quality has become an important concern to both electric utilities and end users due to the increased use of non-linear loads in modem power systems over the past decade. Nonlinear loads inject harmonics into the power system and thus may lead to poor power quality and lower power factor....
    Resource Type:
    Dissertation
    Full Text:
    . Title: A DSP Controlled Resonant Active Filter for Current Harmonic Mitigation in Three-Phase Power

  • A digital multiplying delay locked loop for high frequency clock generation

    Creator:
    Uttarwar, Tushar
    Abstract:
    As Moore’s Law continues to give rise to ever shrinking channel lengths, circuits are becoming more digital and ever increasingly faster. Generating high frequency clocks in such scaled processes is becoming a tough challenge. Digital phase locked loops (DPLLs) are being explored as an alternative to conventional analog PLLs but...
    Resource Type:
    Masters Thesis
    Full Text:
    , 2011 Title: A Digital Multiplying Delay Locked Loop for High Frequency Clock Generation Abstract