Index Catalog // ScholarsArchive@OSU

Creator:: Lee, Chee
Abstract:: Power and timing requirements are becoming more and more stringent as applications move from less mobile devices to more mobile ones. As such, it is important to optimize these applications as much as possible in order to provide the best solution that is low power and low latency. Although there...
Resource Type:: Masters Thesis
Full Text:: my committee, Professors Alexandre Tenca, Alexandre F.T. Yokochi, and Cetin Kaya Koc for taking the

Creator:: Zhou, Junlin, 1973-
Resource Type:: Masters Thesis
Full Text:: OSU. I would like to thank Dr. S. Subramanian and Dr. Alexandre Tenca for their teaching and

Creator:: Venkatesan, Rudhrakumar
Abstract:: Ad Hoc networks are multi-hop wireless networks consisting of mobile hosts. They do not have any pre-existing network infrastructure and are characterized by constantly changing topology, limited battery power and bandwidth. Typical applications of such networks are battlefield networks, medical relief during natural calamities or disasters, conference room networking, and...
Resource Type:: Masters Thesis
Full Text:: way through the entire graduate program. I would like to thank Dr.Bella Bose, Dr.Alexandre Tenca and

Creator:: Megarajan, Balaji
Abstract:: The AE32000 processor core, developed by Advanced Digital Chips Inc., Korea, is used primarily in the embedded processing environment. The AE32000 simulator models this embedded processor core having high code density. An enhanced simulator was developed to study the performance of the present Instruction Set Architecture after comparison with the...
Resource Type:: Masters Thesis
Full Text:: day was extremely helpful. I also like to thank Dr. Alexandre Tenca, Dr. Roger Traylor and Dr

Creator:: Liu, Tong
Abstract:: Current superscalar microprocessors' performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). Higher frequency is achieved with process advancement, new circuit techniques, and microarchitectural improvement. Number of instructions processed per cycle depends mainly on microarchitecture techniques that exploit parallelism both spatially...
Resource Type:: Dissertation
Full Text:: Weisshaar, Alexandre Tenca and Vivek De for been my committee members. I appreciate the entire electrical

ScholarsArchive@OSU