Search Constraints

Start Over
Filtering by: Creator Özis, Hatice Dicle Remove constraint Creator: Özis, Hatice Dicle Creator Ghatak, Kalyan Brata Remove constraint Creator: Ghatak, Kalyan Brata

Search Results

  • Design of sample and holds using CCDs in a standard CMOS process

    Creator:
    Ghatak, Kalyan Brata
    Abstract:
    The parasitic components of MOS switches at high speeds affect the linearity and resolution of CMOS sample and hold circuits. CCD-based circuit design can offer good performance at high speeds. This thesis presents the design of sample and hold circuits using charge-coupled device structures in a standard CMOS process. Three...
    Resource Type:
    Masters Thesis
    Full Text:
    , Robert Batten, Aline Sadate, Shanthi Bhaga- vatheswaran, Dicle Ozis, Nilakantan Seshan, Madhusudhan