This thesis describes the design of a Reduced Instruction Set Computer. Its instruction memory utilizes a unique cache architecture and a two-stage memory pipelining technique. Because of the bandwidth of the 64-bit instruction bus, instruction prefetching is possible and is implemented. The data memory is bridged by a four-way set-associative...
Increasing automation and highly flexible manufacturing processes cause increasing complexity for manufacturing system. FMS (Flexible Manufacturing System) is an approach to solve this problem. Since the elements of the FMS and manufacturing process performance are closely interrelated, the application of simple modeling and emulation techniques in the planning stages for...
The new CMOS folded source-coupled logic (FSCL)
technique intended for mixed-mode integrated circuits has
been designed. It has advantages over conventional CMOS
circuit in terms of reduced current spike, circuit delay,
logic flexibility, and layout density. A simple CPU
implemented in 2 μm CMOS technology with a 5.0 volt supply...
GaAs MESFETs are widely used in high speed integrated circuits (ICs) and
microwave circuits. Due to the materials and processing methods used in GaAs
MESFET fabrication, deep level traps in the substrate materials have a strong influence
on device performance.
In this work we used the drain current transient characterization...
Digitally-programmable filters have been an ongoing research topic for a number of years. The first such filters were FIR transversal filters using Charge-Coupled Devices (CCD's) and IIR recursive filters using switched-capacitor (SC) techniques. Although both techniques achieve excellent results, they require non-standard and/or additional IC fabrication steps. Low substrate doping...
The objective of this thesis is to present the architecture and
design of a neural network-based pattern classifier. The classifier
detects textual characters which have been translated, rotated, and
corrupted by noise. This form of pattern classifier differs
significantly from traditional pattern classifiers. The neural network
architecture used in implementing...
Advances in VLSI array processing have led to many new
parallel structures for real-time Digital Signal Processing (DSP)
applications. Among all the architectures, systolic arrays have played
an important role because systolic arrays have regular, local
interconnections with modular structure. In ordinary systolic arrays,
however, all processing operations and data...
A numerical technique to compute the time domain response of multiconductor lossy
uniform and nonuniform lines terminated in general nonlinear elements is presented. The
technique is based on the generalized method of characteristics. The method transforms the
original system of transmission line equations into a system of ordinary differential
equations....
A recorded image is a degraded version of an original image.
The process of removing the degradations is called restoration. Two
types of degradations are considered in this thesis: namely, linear
motion and defocused lens blurrings. Using the direct deconvolution
technique to restore blurred images is impossible if the blurring...
In recent years, the new integrated circuit technology has spawned the
development of many low cost high performance microcontrollers. With the
improvement in the processor speed, instruction sets, and memory capacities,
these microcontrollers are ideal for the implementation of Control-Oriented
Local Area Networks (COLAN) for real-time distributed control systems. The...